Suppression of audible harmonics in wireless power receivers
Granted: April 24, 2018
Patent Number:
9954398
A wireless power enabled apparatus includes a wireless power receiver. The wireless power receiver includes a receive coil, a rectifier, a regulator, and a damping circuit. The receive coil is configured to generate an AC power signal responsive to a wireless power signal. The rectifier is configured to receive the AC power signal and generate a DC rectified power signal relative to a rectified ground signal. The regulator is operably coupled with the rectifier to receive the DC…
Apparatuses and related methods for detecting coil alignment with a wireless power receiver
Granted: April 17, 2018
Patent Number:
9948112
A wireless power receiver may include a receive coil configured to generate an AC power signal responsive to wireless power transfer from a wireless power transmitter, and control logic configured to detect misalignment of the receive coil and a transmit coil of the wireless power transmitter responsive to a determination of efficiency of wireless power transfer therebetween. A method for operating a wireless power receiver may include detecting misalignment between a receive coil and a…
Method and apparatus for current steering in high sensitivity, high linearity and large dynamic range high speed trans-impedance amplifiers
Granted: April 3, 2018
Patent Number:
9935591
The present invention relates to a linear, high sensitivity, high speed trans-impedance amplifier (TIA) which allows a large dynamic range of input current up to very large values, maintains high linearity and keeps constant output voltage, maintains the same frequency response across the full gain control range, provides very high input sensitivity and large bandwidth, and allows input current monitoring without affecting input sensitivity. In other words, the novel circuit disclosed…
System and method for wireless power transfer using a power converter with a bypass mode
Granted: April 3, 2018
Patent Number:
9935470
A system and method of wireless power transfer using a power converter with a bypass mode includes a power converter. The power converter includes a pulsed switch, a capacitor configured to supply a drive voltage to the pulsed switch, a first circuit configured to charge the capacitor when the power converter operates in a switched mode of operation, and, a second circuit configured to charge the capacitor when the power converter operates in a bypass mode of operation.
Methods and apparatuses for power control during backscatter modulation in wireless power receivers
Granted: March 27, 2018
Patent Number:
9929568
A wireless power enabled apparatus including a wireless power receiver. The wireless power receiver includes a receive coil configured to generate an AC power signal responsive to a wireless power signal. A rectifier is configured to receive the AC power signal and generate a DC rectified power signal. A power transistor in a pass-transistor configuration is configured to receive the DC rectified power signal and generate an output power signal. A compensation current source operably…
Low latency interconnect integrated event handling
Granted: March 20, 2018
Patent Number:
9921891
Low Latency Interconnect Integrated Event Handling has been disclosed. In one implementation a hardware based interrupt controller coupled with a hardware based event queue manager, dedicated hardware based queues, and processor instruction extensions allows for off-loading event processing from an operating system thereby dramatically lowering wasted processor cycles while speeding up event processing.
Adjustable termination circuit for high speed laser driver
Granted: February 27, 2018
Patent Number:
9905995
Disclosed is a circuit having a high speed laser driver circuit, a semiconductor laser electrically connected to the high speed laser driver circuit, and an adjustable termination circuit electrically connected between the high speed laser driver circuit and the semiconductor laser, where the adjustable termination circuit is configured to control an output impedance seen by the semiconductor laser as a function of an input current provided to the adjustable termination circuit.
Asymmetrical emphasis in a memory data bus driver
Granted: February 27, 2018
Patent Number:
9905287
An apparatus includes an interface and a circuit. The interface may be configured to generate a read signal that carries read data from a memory channel. The circuit may be configured to (i) modify the read signal with a de-emphasis on each pull up of the read signal and a pre-emphasis on each pull down of the read signal and (ii) transfer the read signal as modified to a memory controller.
System and method for wireless power transfer using automatic power supply selection
Granted: February 20, 2018
Patent Number:
9898060
A system and method of wireless power transfer using automatic power supply selection includes an electronic system. The electronic system includes an electronics module, a primary power supply that receives power from a primary external power source, a secondary power supply that receives power from a secondary external power source, and a selection module. When the primary power supply is operative, the selection module selects the primary power supply to supply power to the…
High frequency wireless power rectifier startup circuit design
Granted: February 20, 2018
Patent Number:
9899908
A rectifier circuit can include a plurality of FETs arranged as a rectifier; and a start-up circuit applied to each of the plurality of FETs that turn each of the FETs off during a circuit startup period, wherein the start-up circuit provides a large impedance for low power dissipation during normal operation of the rectifier.
Fractional divider using a calibrated digital-to-time converter
Granted: February 20, 2018
Patent Number:
9897976
An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a divided clock signal and a control signal in response to (i) an input clock signal and (ii) a configuration signal. The second circuit may be configured to generate an output clock signal in response to (i) the control signal and (ii) the divided clock signal. The second circuit may add a delay to one or more edges of the output clock signal by engaging one or more of a…
Nullifying incorrect sampled data contribution in decision feedback equalizer at restart of forwarded clock in memory system
Granted: January 9, 2018
Patent Number:
9865328
An apparatus includes a detector circuit and a data buffer. The detector circuit may be configured to (i) identify a start of a command sequence associated with a directed access to a memory system and (ii) generate a control signal indicating a non-consecutive clock associated with the start of said command sequence. The data buffer circuit may be configured to initialize a condition of a receiver circuit in response to the control signal prior to reception of a first data bit…
Compensation of deterministic crosstalk in memory system
Granted: January 9, 2018
Patent Number:
9865315
An apparatus includes a detector circuit and a receiver circuit. The detector circuit may be configured to (i) identify a start of a command sequence associated with a directed access to a memory system and (ii) generate a control signal indicating a non-consecutive clock associated with the start of the command sequence. The receiver circuit may be configured to initialize an equalizer circuit configured to compensate for deterministic crosstalk coupled between a data line and a data…
Method for time-dependent visual quality encoding for broadcast services
Granted: January 2, 2018
Patent Number:
9860535
Apparatuses and methods for adjusting an encoding profile to change the visual quality of broadcast video based, at least in part, on a time of day. An example apparatus may include an encoder configured to receive a video input and provide an encoded bitstream based at least in part on an encoding profile, wherein the encoder is further configured to determine the encoding profile based on a time of day. An example method may include encoding images based on a first profile during a…
Wireless power receiver with magnetic data transaction capability
Granted: January 2, 2018
Patent Number:
9859950
A transmitter/receiver that includes a wireless power receiving mode and a data transmission mode. In the wireless power receiving mode, the transmitter/receiver receives wireless power through and coil and provides power to a load. In data transmission mode, the transmitter/receives drives the coil according to data to transmit data.
Buffer with programmable input/output phase relationship
Granted: January 2, 2018
Patent Number:
9859901
An apparatus includes a phase locked loop circuit having a phase comparator for generating a signal indicative of a phase difference between a signal presented to a first input of the phase comparator and a signal presented to a second input of the phase comparator. The apparatus includes at least one delay element disposed so as to enable contributing at least one of the following: i) delay to a signal provided to the first input of the phase comparator; ii) delay to a signal…
Signal driver slew rate control
Granted: December 26, 2017
Patent Number:
9853632
An apparatus includes a first circuit and a second circuit. The first circuit may be configured to (i) generate a plurality of delayed signals each as a copy of an input signal shifted in time by a sequence of respective delays based on a control signal and (ii) change a number of driver signals that are active during each delay in the sequence of respective delays based on the input signal and the plurality of delayed signals to control a slew rate of an output signal. The second…
Phase locked loop (PLL) timing device evaluation system and method for evaluating PLL timing devices
Granted: December 26, 2017
Patent Number:
9852039
An evaluation board and a method for evaluating Phase Locked Loop (PLL) timing devices. The evaluation board includes an input and output circuit disposed on a circuit board along with control logic, and a plurality of PLL-timed physical devices that are identical to the physical devices used in the customer's communication system. A first connector receptacle and a second connector receptacle are coupled to the control logic and to one or more of the PLL-timed physical devices, and are…
Synchronization of data transmission with a clock signal after a memory mode switch
Granted: December 19, 2017
Patent Number:
9847112
An apparatus includes a transmitter and a controller. The transmitter may be configured to transmit data stored in a memory. The controller may be configured to (i) train one or more transmit parameters of the transmitter to synchronize transmission of the data with a clock signal while in a first mode, (ii) save the transmit parameters in response to a command received while the transmitter is in the first mode, and (iii) configure the transmitter to transmit the data while in a second…
Frequency synthesizer with microcode control
Granted: December 19, 2017
Patent Number:
9847869
A frequency synthesizer with microcode control that allows one or more programmable circuits of a frequency synthesizer system to be programmed using a plurality of microcode instructions. A method includes, setting a frequency synthesizer system to operate in a microcode mode, programming the frequency synthesizer system for microcode execution of a plurality of microcode instructions and executing the plurality of microcode instructions at the frequency synthesizer system to control…
