PCI express switch and method for multi-port non-transparent switching
Granted: April 23, 2013
Patent Number:
8429325
A peripheral component interconnect express (PCIe) switch includes non-transparent endpoints, each of which is associated with a bus hierarchy domain. A source non-transparent endpoint in a source bus hierarchy domain receives a packet including a destination address and identifies a destination bus hierarchy domain including a destination non-transparent endpoint based on the destination address. Further, the source non-transparent endpoint translates a requester identifier in the…
Methods and apparatuses for combined frequency compensation and soft start processes
Granted: April 23, 2013
Patent Number:
8427130
Soft start circuits for a switching power converter include an amplifier configured to operate from a common bias node and amplify a difference between a positive input and a negative input to generate an amplifier output. A soft start bias circuit supplies a soft start bias current during a soft start process for the switching power converter. An operational bias circuit supplies an operational bias current after the soft start process. In some embodiments, a capacitor is operably…
Methods of packaging microelectromechanical resonators
Granted: April 23, 2013
Patent Number:
8426233
Methods of forming packaged microelectromechanical resonators include forming a first isolation trench in a first surface of a capping substrate, with the first isolation trench encircling a first portion of the capping substrate. The first isolation trench is filled with an electrically insulating material. The first surface of the capping substrate is bonded to a device substrate, which includes the microelectromechanical resonator and at least a first electrically conductive line…
Managing transmit jitter for multi-format digital audio transmission
Granted: April 16, 2013
Patent Number:
8422518
A method of transmitting audio data across a digital interface is provided. The method includes receiving audio data, organized as a plurality of audio samples. At least one of the plurality of audio samples may be placed into a data packet. The data packet may be transmitted during a valid transmission interval if the data packet is full or during a valid transmission interval in response to receiving a packet send event.
Method and apparatus for a low power AC On-Die-Termination (ODT) circuit
Granted: April 2, 2013
Patent Number:
8410813
A method and apparatus for A Low Power AC On-Die-Termination (ODT) Circuit using active components reduces receiver power consumption.
Bifurcate arbiter
Granted: March 19, 2013
Patent Number:
8402181
An arbiter for a space switch comprising a two buffers, a media access controller having data outputs coupled to the two buffers, and two control outputs coupled to respective buffers for buffering input data at a clock rate one-half that of the input data and a switch fabric connected to the two buffers for matching buffer data throughput with switch data throughput, the arbiter comprising first and second schedulers, each scheduler includes a plurality of inputs for connection to the…
Pipeline scheduler for a packet switch
Granted: March 19, 2013
Patent Number:
8400915
A packet switch includes a pipeline scheduler for scheduling packets according to a credit-based flow control protocol. A credit update pipeline stage initializes available credits for egress ports of the packet switch. A request pipeline stage generates packet requests for packets based on the available credits. A grant pipeline stage selects packets based on the ports requests and the available credits, and generates port grants for the selected packets. Additionally, the credit update…
Bypass capacitor with reduced leakage current and power-down control
Granted: March 19, 2013
Patent Number:
8400746
An integrated circuit is disclosed to bypass transients between first and second nodes. The circuit includes a first bypass capacitor implemented as a metal oxide semiconductor (MOS) transistor and coupled to a first node; and a switch coupled to the first bypass capacitor and the second node, the switch preventing leakage current from passing through the first bypass capacitor during power down.
Method to improve performance of a proportional area weighted sensor for two-dimensional locations on a touch screen
Granted: March 19, 2013
Patent Number:
8400431
An electronic appliance including a processor and a computer-readable medium, having instructions for execution by a processor is provided. The instructions causing the processor to perform methods to obtain an error map for locations in a touch sensor. The method including inputting a geometry for a touch sensor layout; inputting coordinates for centroids of sensing elements in the touch sensor layout; and inputting a touch geometry. The method includes the steps of selecting a…
BCH data correction system and method
Granted: March 12, 2013
Patent Number:
8397144
In various embodiments, a data correction system has a data path including search modules. Each of the search modules has a respective bit error capacity for locating a number of data bit errors in a data unit based on a locator polynomial. The data correction system generates a syndrome based on an input data unit, generates a locator polynomial based on the syndrome, and determines a number of data bit errors in the input data unit based on the locator polynomial. Additionally, the…
Method and apparatus for placing quartz SAW devices together with clock/oscillator
Granted: March 12, 2013
Patent Number:
8395247
A method and apparatus for placing quartz SAW (Surface Acoustic Wave) devices together with a clock/oscillator have been disclosed. Mounting on a single lead frame both a SAW device and an integrated circuit (IC).
Method and apparatus for externally aided self adjusting real time clock
Granted: March 5, 2013
Patent Number:
8392001
A method and apparatus for externally aided self adjusting real time clock have been disclosed. A circuit having a pulse train output is coupled to an adjusting circuit, a real-time clock is coupled to the adjusting circuit, and a proportional integral derivative time processor is coupled to the adjusting circuit, and where the adjusting circuit affects the pulse train output.
High-performance ingress buffer for a packet switch
Granted: March 5, 2013
Patent Number:
8391302
A packet switch includes ingress ports, each of which contains a random access memory having a storage capacity for storing data. An ingress controller of the packet switch allocates the storage capacity of each random access memory among transaction types of packets by allocating credits to each of the transactions types for the random access memory. Each ingress port accepts packets based on the transaction types of the packets and the credits of the random access memory in the ingress…
Proportional area weighted sensor for two-dimensional locations on a touch-screen
Granted: March 5, 2013
Patent Number:
8390591
A touch sensor is provided including a controller and a planar layout having an edge and an interior portion. Further including a connector coupling the touch controller to the layout; a substrate made of a first material; and sensing elements made of a second material formed on the substrate and covering the layout without overlapping. Sensing elements have non-monotonic widths from the center along two perpendicular directions, and a centroid. The touch sensor including pass-through…
System and method of enabling codec device features
Granted: February 26, 2013
Patent Number:
8386758
A computing system includes a codec device, a basic input-output system including both configuration data and feature data for the codec device, and a device driver for the codec device. The basic input-output system configures the codec device based on the configuration data. The device driver reads the feature data from the basic input-output system and enables one or more features of the codec device based on the feature data. In various embodiments, the device driver is WHQL…
Voltage level shifting apparatuses and methods
Granted: February 26, 2013
Patent Number:
8384431
Level shifting circuits and related methods are disclosed herein. The level shifting circuit includes a cross-coupled pull-up circuit coupled to a higher supply voltage, an output signal, and an inverted output signal. An input signal transitions between a ground and a lower supply voltage and an inverted input signal transitions in a direction opposite from the input signal between the ground and the lower supply voltage. A first n-channel transistor has a gate coupled to the lower…
System and method for formatting symbols in a data stream
Granted: February 19, 2013
Patent Number:
8379771
A data receiver identifies an alignment symbol in a parallel data stream including encoded symbols, generates a bit order indicator indicating a bit order of the alignment symbol identified in the parallel data stream, and generates a symbol stream including the encoded symbols. Further, the data receiver decodes symbols in the symbol stream and generates a bit polarity indicator indicating a bit polarity of the parallel data stream based on the decoded symbols. Additionally, the data…
Apparatuses and methods for reducing errors in analog to digital converters
Granted: February 19, 2013
Patent Number:
8378864
Successive approximation Analog-to-digital converters (ADCs) and related methods are disclosed. A successive approximation ADC includes a comparator with a comparator output and inputs coupled to a common model signal and a compare input. Control logic generates one or more control signals responsive to the comparator output. A capacitor array includes first sides of capacitors operably coupled to an array output. The capacitor arrays selectively couples each of second sides of the…
Voltage-mode line driving circuit having adaptive impedance matching
Granted: February 19, 2013
Patent Number:
8378746
A voltage-mode line driving circuit is provided. The voltage-mode line driving circuit includes a driving circuit, the driving circuit receiving, as an input signal, a feedback signal, and outputting an output signal. The voltage-mode line driving signal also includes an adaptive tuning circuit coupled to the driving circuit, the adaptive tuning circuit receiving as input signals the feedback signal and the output signal and adaptively outputting a modifying signal to the driving circuit…
5V tolerant circuit for CML transceiver in AC-couple
Granted: February 19, 2013
Patent Number:
8378714
A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their…
