HIGH EFFICIENCY PFM CONTROL FOR BUCK-BOOST CONVERTER
Granted: September 13, 2012
Application Number:
20120229110
A buck/boost voltage regulator generates a regulated output voltage responsive to an input voltage and a plurality of control signals. The buck/boost voltage regulator includes a plurality of switching transistors responsive to the plurality of control signals. Control circuitry monitors the regulated output voltage and generates the plurality of control signals responsive thereto. The control circuitry controls the operation of the plurality of switching transistors to enable a charging…
SYSTEM AND METHOD FOR PREVENTING CONTROLLER INDUCED PULSE SKIPPING AT LOW DUTY CYCLE OPERATIONS
Granted: September 13, 2012
Application Number:
20120229113
A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at…
SYSTEM AND METHOD FOR CURRENT SENSING WITHIN A VOLTAGE REGULATOR
Granted: September 13, 2012
Application Number:
20120229107
A current sense amplifier includes a high-side current sense amplifier and a low-side current sense amplifier. The high-side current sense amplifier provides a current sense voltage signal for use with a voltage regulator and generates the current sense voltage signal responsive to a first current sensed through a high-side switching transistor in a first mode when the high-side switching transistor is turned on and the low-side switching transistor is turned off. The high-side current…
METHOD AND APPARATUS FOR LOW STANDBY CURRENT SWITCHING REGULATOR
Granted: September 6, 2012
Application Number:
20120223687
A regulator controller which controls conversion of an input voltage to an output voltage, including a switching regulator, a low dropout (LDO) regulator, and a mode controller. The switching regulator develops a pulse control signal to regulate the output voltage when enabled. The LDO regulator also regulates the output voltage when enabled. The mode controller enables or disables the switching regulator and the LDO regulator based on a load condition. The switching regulator is enabled…
SYSTEM AND METHOD FOR IMPROVING REGULATION ACCURACY OF SWITCH MODE REGULATOR DURING DCM
Granted: August 23, 2012
Application Number:
20120212204
A controller for a switch mode regulator with discontinuous conduction mode (DCM) correction which includes a correction network and a modulator. The correction network detects a low load condition indicative of regulation error during DCM and asserts an adjust value indicative thereof. The modulator receives the adjust value and adjusts operation accordingly to improve regulation during DCM. The correction network receives or determines a regulation metric, such as periods between…
SHUNT REGULATOR FOR HIGH VOLTAGE OUTPUT USING INDIRECT OUTPUT VOLTAGE SENSING
Granted: August 9, 2012
Application Number:
20120200272
Embodiments disclosed herein provide for a voltage regulator having one or more Zener diodes coupled in series between an output voltage and system ground. The one or more Zener diodes are in a reverse biased configuration. A transistor is coupled in series with the one or more Zener diodes between the one or more Zener diodes and system ground. A control circuit is coupled to the transistor and configured to adjust the transistor to control a voltage level of the output voltage. The…
ESD CLAMP FOR MULTI-BONDED PINS
Granted: August 9, 2012
Application Number:
20120200962
A circuit comprises a plurality of segments and a clamp circuit. Each of the plurality of segments comprises a bond pad coupled to a multi-bonded pin via a respective bond wire and a conductor coupling the bond pad to a respective internal connection. The bond pad from each of the plurality of segments is coupled to the same multi-bonded pin. The clamp circuit comprises a plurality of input pins and a plurality of clamp transistors. Each input pin is coupled to the bond pad of a…
SIGMA-DELTA CONVERTER SYSTEM AND METHOD
Granted: August 2, 2012
Application Number:
20120194370
A sigma-delta converter may include a filter coupled to a first summation circuit and a second summation circuit. A multi bit quantizer may be coupled to the second summation circuit. A single bit digital-to-analog converter (DAC) may be included that defines a feedback path between the multi-bit quantizer and the first summation circuit. A feed-forward coefficient circuit defining a feed forward path between the first summation circuit and the second summation circuit may be included.
BATTERY CHARGER FOR USE WITH LOW VOLTAGE ENERGY HARVESTING DEVICE
Granted: July 26, 2012
Application Number:
20120187897
A battery charging integrated circuit includes a first input connected to an energy harvesting device and a first output providing charging voltage to a battery. Control circuitry charges the battery through the first output responsive to an input from the energy harvesting device. The battery charging integrated circuit is powered by the battery connected to the first output.
DATA LOOK AHEAD TO REDUCE POWER CONSUMPTION
Granted: July 26, 2012
Application Number:
20120188461
Portions of a digital signal are buffered prior to being provided to a sub-system (e.g., a segmented DAC of a LDD) that is responsive to the digital signal. While being buffered, there is a determination, based on the buffered portions of the digital signal, of when one or more portions of the sub-system and/or another sub-system can be switched from a first state to a second state, where the second state results in less power dissipation than the first state. Based on results of the…
CO-PACKAGING APPROACH FOR POWER CONVERTERS BASED ON PLANAR DEVICES, STRUCTURE AND METHOD
Granted: July 12, 2012
Application Number:
20120178211
A voltage converter includes an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The high-side device can include a lateral diffused metal oxide semiconductor (LDMOS) while the low-side device can include a planar vertical diffused metal oxide semiconductor (VDMOS). The voltage converter can further include a controller circuit on a different die which can be electrically coupled to, and co-packaged with, the power…
SINGLE DIE OUTPUT POWER STAGE USING TRENCH-GATE LOW-SIDE AND LDMOS HIGH-SIDE MOSFETS, STRUCTURE AND METHOD
Granted: July 5, 2012
Application Number:
20120171817
A voltage converter includes an output circuit having a high-side device and a low-side device which can be formed on a single die (a “PowerDie”). The high-side device can include a lateral diffused metal oxide semiconductor (LDMOS) while the low-side device can include a trench-gate vertical diffused metal oxide semiconductor (VDMOS). The voltage converter can further include a controller circuit on a different die which can be electrically coupled to, and co-packaged with the…
INTEGRATED NON-LINEARITY (INL) AND DIFFERENTIAL NON-LINEARITY (DNL) CORRECTION TECHNIQUES FOR DIGITAL-TO-ANALOG CONVERTERS (DACS)
Granted: June 28, 2012
Application Number:
20120161992
INL values are determined for sub-segments of a DAC adapted to accept N bit digital input codes, and a first set of correction codes that can be used to reduce to a range of INL values (to improve linearity of the DAC) are determined and stored. Additionally, DNL values are determined for the sub-segments of the DAC, and a second set of correction codes that can be used to ensure that all values of DNL>?1 (to ensure that the DAC is monotonic) are determined and stored. This can…
SYSTEMS AND METHODS FOR DYNAMIC POWER MANAGEMENT FOR USE WITH A VIDEO DISPLAY DEVICE
Granted: June 21, 2012
Application Number:
20120153861
Embodiments of the present invention relate to methods and circuits for use with a system including a light emitting element (e.g., a laser diode or light emitting diode) that is driven by a current produced by a current output digital-to-analog converter (DAC), wherein the light emitting element or the DAC is powered by a supply voltage produced by a voltage supply. In accordance with an embodiment, a measure indicative of a voltage at an output of the DAC is obtained, wherein the…
CLIP INTERCONNECT WITH ENCAPSULATION MATERIAL LOCKING FEATURE
Granted: May 31, 2012
Application Number:
20120133037
A clip interconnect comprises a columnar part, a bridge part, and a locking feature. The bridge part has a plurality of sides. The columnar part and the bridge part are configured to form an angle at an interface between the columnar part and the bridge part. The locking feature is located in at least one of the plurality of sides of the bridge part. The locking feature comprises an alternating pattern of teeth and valleys.
COMMUNICATING WITH A SELF-CLOCKING AMPLITUDE MODULATED SIGNAL
Granted: May 31, 2012
Application Number:
20120134394
Examples disclosed herein provide for a method for transmitting a signal. The method includes generating a Manchester encoded data stream and combining the Manchester encoded data stream with an amplified clock signal to produce an amplitude modulated signal having a zero crossing at each edge of the amplified clock signal. The amplitude modulated signal can then be sent over a communication medium.
SWITCHING REGULATOR WITH BALANCED CONTROL CONFIGURATION WITH FILTERING AND REFERENCING TO ELIMINATE COMPENSATION
Granted: May 24, 2012
Application Number:
20120126773
A switching regulator and controller and an electronic device using same are disclosed in which the controller includes a sense circuit, an error amplifier circuit, a filter and reference circuit, and a comparator circuit. The switching regulator includes a pulse switch circuit coupled to an output inductor for developing an output voltage. The sense circuit provides a sense signal indicative of current through the output inductor. The error amplifier circuit develops an error signal…
CLASS AB OUTPUT STAGES AND AMPLIFIERS INCLUDING CLASS AB OUTPUT STAGES
Granted: May 17, 2012
Application Number:
20120119833
A buffer stage includes a flipped voltage follower and an emitter follower. The flipped voltage follower is connected between a high voltage rail and a low voltage rail and includes an input and an output. The emitter follower is also connected between the high voltage rail and the low voltage rail and includes an input and an output. A resistor connects the output of the flipped voltage follower to the output of the emitter follower. The input of the flipped voltage follower and the…
SYNTHETIC RIPPLE REGULATOR WITH FREQUENCY CONTROL
Granted: May 10, 2012
Application Number:
20120112721
A synthetic ripple regulator including frequency control based on a reference clock. The regulator includes an error network, a ripple detector, a combiner, a ripple generator, a comparator network and a phase comparator. The error network provides an error signal indicative of relative error of the output voltage. The ripple detector provides a ramp control signal based on the input and output voltages and a pulse control signal. The combiner adjusts the ramp control signal based on a…
CLOCK PHASE SHIFTER FOR USE WITH BUCK-BOOST CONVERTER
Granted: May 3, 2012
Application Number:
20120105038
A buck boost converter generates a regulated output voltage responsive to an input voltage and switching control signals. Switching control circuitry generates the switching control signals responsive to the regulated output voltage, a maximum duty cycle signal and a mode signal. Mode control circuitry generates the maximum duty cycle signal and the mode signal responsive to a buck PWM signal and a boost PWM signal, a first clock signal and a second clock signal phase shifted from the…
