Time-hopping low-power wireless network for turning off and on fluorescent lamps
Granted: May 22, 2012
Patent Number:
8184674
A low-power wireless network involves a master and a plurality of RF-enabled fluorescent lamp starter units. In each of a plurality of intervals, a starter wakes up and listens for a beacon, regardless of whether a beacon is transmitted during that interval or not. The starter operates in a low power sleep mode during the majority of the interval. The master can transmit during the beacon slot time of any interval, but typically only transmits frequently enough to maintain starter…
Programmable LED driver
Granted: May 1, 2012
Patent Number:
8169387
An LED driver includes an embedded non-volatile memory (NVM) capable of being programmed and storing control data for setting a variety of features of the LED driver, such as the maximum current for driving the LEDs, analog parameters such as the resistance of the internal resistor for setting the reference current for the LEDs, and the operation modes of the charge pump of the LED driver. This enables implementation of multiple LED driver product options without the need for different…
Wall plug power monitor
Granted: April 24, 2012
Patent Number:
8165832
A wall plug power monitor accurately measures power consumption of an appliance connected via a wall plug power monitor to AC power supplies of any of the various frequencies used around the world. A three milliohm current sense resistor minimizes power consumption caused by current sensing. Digital oversampling and filtering methods allow for accurate calculation of voltage, current, and power consumption despite line noise and a minimized current sense resistor. Voltage sampling timed…
Semiconductor power device with passivation layers
Granted: April 10, 2012
Patent Number:
8153481
A semiconductor power device comprises a semiconductor substrate. The substrate includes an N-type silicon region and N+ silicon region. An oxide layer overlies the N? type silicon region, the oxide layer formed using a Plasma Enhanced Chemical Vapor deposition (PECVD) method. First and second electrodes are coupled to the N? type silicon region and the N+ type silicon region, respectively. The oxide layer has a thickness 0.5 to 3 microns. The power device also includes a polymide layer…
Network master for wireless fluorescent lamp lighting control networks
Granted: January 31, 2012
Patent Number:
8106607
A system involves a plurality of RF-enabled occupancy detectors. Each occupancy detector communicates with and controls an associated plurality of RF-enabled fluorescent lamp starter units. A network master has an RF transceiver used to communicate with the occupancy detectors using a first protocol, thereby retrieving status information from the starter units. The network master also has a second RF transceiver for communicating directly with a cellular telephone using a second…
ESD protection transistor
Granted: January 10, 2012
Patent Number:
8093121
An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary logic transistors of an integrated circuit without severely affecting the performance of the transistors. The outrigger is used as an implant blocking structure to form first and second drain regions on either side of a lightly doped region that underlies the outrigger. The self-aligned…
Breakdown voltage for power devices
Granted: January 10, 2012
Patent Number:
8093652
A power device includes a semiconductor substrate of first conductivity having an upper surface and a lower surface. An isolation diffusion region of second conductivity is provided at a periphery of the substrate and extends from the upper surface to the lower surface of the substrate. The isolation diffusion region has a first surface corresponding to the upper surface of the substrate and a second surface corresponding to the lower surface. A peripheral junction region of second…
Cooperating memory controllers that share data bus terminals for accessing wide external devices
Granted: December 6, 2011
Patent Number:
8074033
A memory controller mechanism is operable in a first mode and a second mode. In the first mode, a first memory controller portion of the mechanism can use a first set of data terminals to perform a first external bus access operation (EBAO) and a second memory controller portion of the mechanism can use a second set of data terminals to perform a second EBAO. The first and second EBAO operations may be narrow accesses that occur simultaneously. In the second mode, one of the controllers…
ESD protection transistor
Granted: November 22, 2011
Patent Number:
8062941
An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary logic transistors of an integrated circuit without severely affecting the performance of the transistors. The outrigger is used as an implant blocking structure to form first and second drain regions on either side of a lightly doped region that underlies the outrigger. The self-aligned…
Frequency trimming for internal oscillator for test-time reduction
Granted: November 15, 2011
Patent Number:
8058893
An internal precision oscillator (IPO) is trimmed within a microcontroller integrated circuit. The microcontroller integrated circuit receives a test program into flash memory on the microcontroller integrated circuit from a tester. The microcontroller integrated circuit also receives a reference signal from the tester. The IPO generates a clock signal having a frequency that depends upon a trim value. A general purpose timer on the microcontroller integrated circuit counts the number of…
Conditional back-to-back interrupt vectoring
Granted: November 1, 2011
Patent Number:
8051235
Upon execution of an interrupt return (IRET) instruction when a second interrupt is pending, rather than popping a stack, obtaining processor state information, and then pushing the state information back onto the stack prior to vectoring off to a second interrupt service routine, direct vectoring is employed such that the stack is not pushed or popped but rather the processor vectors directly from the IRET instruction in the first interrupt service routine to the second interrupt…
Rugged and fast power MOSFET and IGBT
Granted: October 25, 2011
Patent Number:
RE42864
A power semiconductor device includes a substrate having an upper surface and a lower surface. A source region of first conductivity is formed within a well region of second conductivity. The source region is provided proximate to the upper surface of the substrate. The well region has a non-polygon design. A gate electrode overlies the upper surface of the substrate. A drain electrode is provided proximate to the lower surface of the substrate.
Sample and hold time stamp for sensing zero crossing of back electromotive force in 3-phase brushless DC motors
Granted: October 4, 2011
Patent Number:
8030867
A microcontroller determines the position of the rotor of a brushless, direct-current motor by determining the time of zero crossing of back electromotive force (EMF) emanating from the non-driven phase winding. The zero crossing point is determined by interpolating voltage differentials that are time stamped. Each voltage differential is the difference between the phase voltage of the phase winding and the motor neutral point voltage. The time of zero crossing is determined without…
Process to improve high-performance capacitors in integrated MOS technologies
Granted: September 13, 2011
Patent Number:
8017475
A method of fabricating a high-performance capacitor that may be incorporated into a standard CMOS fabrication process suitable for submicron devices is described. The parameters used in the standard CMOS process may be maintained, particularly for the definition and etch of the lower electrode layer. To reduce variation in critical dimension width, an Anti-Reflective Layer (ARL) is used, such as a Plasma Enhanced chemical vapor deposition Anti-Reflective Layer (PEARL) or other…
IrDA transceiver module that also functions as remote control IR transmitter
Granted: June 14, 2011
Patent Number:
7962041
The infrared LED of an IrDA module transmits IR energy with a peak wavelength (for example, 875 nm) appropriate for IrDA communication. This peak wavelength is lower than is the wavelength (for example, 940 nm) used in ordinary IR remote controls (RC). The IrDA LED does, however, transmit some energy at the wavelength of the peak sensitivity of an RC receiver. When making an IrDA transmission, the IrDA LED is driven with a lower amount of current. When making an RC transmission, the IrDA…
ESD protection transistor
Granted: April 19, 2011
Patent Number:
7927944
An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary logic transistors of an integrated circuit without severely affecting the performance of the transistors. The outrigger is used as an implant blocking structure to form first and second drain regions on either side of a lightly doped region that underlies the outrigger. The self-aligned…
Clock input filter circuit
Granted: April 19, 2011
Patent Number:
7928772
A clock input filter uses a first programmable low-pass delay element to filter during a low period of an input clock signal and to output a SET signal. The clock input filter uses a second programmable low-pass delay element to filter during a high period of the input clock signal and to output a RESET signal. A latch is set and reset by the SET and RESET signals. The latch outputs a filtered version of the input signal that has the same approximate duty cycle as the input signal. A…
General purpose ball grid array security cap
Granted: March 1, 2011
Patent Number:
7898090
A general purpose BGA security cap includes a substrate, an integrated circuit die, and an array of bond balls. The substrate includes an anti-tamper security mesh of conductors. The bond balls include outer bond balls and inner bond balls that are fixed to the underside of the substrate. The integrated circuit drives and monitors the anti-tamper security mesh and communicates data using a serial physical interface through a subset of the inner bond balls. In one example, a user has…
Glitch-free clock multiplexer that provides an output clock signal based on edge detection
Granted: February 22, 2011
Patent Number:
7893748
Clock multiplexing techniques generate an output clock signal by detecting edges of a selected input clock signal and toggling the output clock signal based on detected edges of the selected input clock signal. Toggle signals are generated based on detected edges of the selected input clock signal. Toggle signals are used to control when the output clock signal is to toggle high or low. A latch holds the state of the output clock signal in its current state until changed by receipt of a…
Press-fit integrated circuit package involving compressed spring contact beams
Granted: February 8, 2011
Patent Number:
7884489
An insulative substrate includes a plurality of flexible retaining clips and a plurality of alignment and retaining pins. A metal leadframe includes a plurality of leads. Each lead terminates in a spring contact beam portion. The leadframe is attached to the substrate (for example, by fitting a hole in each lead over a corresponding alignment and retaining pin and then thermally deforming the pin to hold the lead in place). An integrated circuit is press-fit down through the retaining…
