METHOD FOR PLASMA ETCHING A LAYER BASED ON A III-N MATERIAL
Granted: March 6, 2025
Application Number:
20250079122
A method for etching at least a portion of a layer based on a III-N material includes exposing a least one portion of an upper face of the III-N layer to a plasma treatment with bias voltage pulsing based on chlorine, wherein the plasma treatment is configured to present a duty cycle comprised between 20% and 80%. A first non-zero polarization bias is applied to the substrate during Ton, and a second polarization bias lesser than the first non-zero polarization bias or no polarization…
DEPOSITION OF METALS IN RECESSED FEATURES WITH THE USE OF HALOGEN-CONTAINING DEPOSITION INHIBITORS
Granted: February 27, 2025
Application Number:
20250069948
Metal films, such as molybdenum films are deposited on a semiconductor substrate having one or more recessed features in a deposition process modulated by addition of a halogen-containing compound (e.g., an alkyl halide). In some implementations, a pre-treatment of a substrate with a halogen-containing compound is performed prior to contacting the substrate with a metal-containing precursor and a reducing agent. In some embodiments, the pre-treatment is performed such that the…
METHOD FOR REDUCING VARIATIONS IN MASK TOPOGRAPHY
Granted: February 13, 2025
Application Number:
20250054769
A patterning method includes etching a mask formed above a stack of two or more layers where the mask comprises a first patterned structure, a second patterned structure above the first patterned structure, where portions of the second patterned structure intersect the first patterned structure to form intersections and at least an opening. The mask includes a structure vertically between portions of the second patterned structure and the stack. The method includes etching a first layer…
A WAFER CHUCK ASSEMBLY WITH THERMAL INSULATION FOR RF CONNECTIONS
Granted: February 13, 2025
Application Number:
20250054736
Described is a wafer chuck assembly comprising a platen with one or more plasma electrodes, and a radio frequency (RF) assembly comprising at least one RF conductor electrically coupled to the one or more plasma electrodes. The at least one RF conductor comprises a rod with a rod tip coupled to the one or more plasma electrodes, and a rod stem mechanically coupled to a thermal choke with a hollow interior. The rod comprises a first electrically conductive material and has a first width…
MULTIPLE-ZONE GAS BOX BLOCK SURFACE HEATER
Granted: February 13, 2025
Application Number:
20250051921
A gas conditioning apparatus comprising a substrate block comprising one or more fluid ports on an upper surface of the substrate block. The substrate block has a first length along a sidewall. The substrate block comprises an inlet port at a first end and an outlet port at a second end. A flow passage extends within the substrate block between the inlet port and the outlet port and is in fluidic communication with the one or more fluid ports. At least one heater strip is on the sidewall…
WAFER TRANSFER PADDLES WITH MINIMUM CONTACT AREA STRUCTURES FOR REDUCED BACKSIDE MARKING
Granted: February 6, 2025
Application Number:
20250046644
A wafer processing apparatus comprising a vacuum chamber, the vacuum chamber comprising a wafer transfer arm and a wafer transfer paddle coupled to the wafer transfer arm. The wafer transfer paddle comprises at least one minimum contact area (MCA) feature integral with an upper surface of the wafer transfer paddle and extending a z-height over the upper surface of the wafer transfer paddle. The wafer transfer paddle comprises a gas flow bypass structure on or adjacent to the MCA feature.
A METHOD AND APPARATUS FOR ENHANCING ION ENERGY AND REDUCING ION ENERGY SPREAD IN AN INDUCTIVELY COUPLED PLASMA
Granted: February 6, 2025
Application Number:
20250046572
A method for operating a plasma chamber to increase ion energy and decrease angular spread of ions during an etch operation is described. Method includes placing a substrate on an electrostatic chuck within the plasma chamber, wherein the electrostatic chuck is electrically coupled to a node. Method further includes forming a plasma in the plasma chamber, where the plasma produces a sheath with a first sheath voltage. The method further includes increasing the first sheath voltage to a…
LOW TEMPERATURE MOLYBDENUM DEPOSITION ASSISTED BY SILICON-CONTAINING REACTANTS
Granted: January 30, 2025
Application Number:
20250038003
Molybdenum-containing films are deposited on semiconductor substrates at relatively low temperatures of between about 100 and about 500° C., such as between about 200 and about 450° C. For example, molybdenum metal can be deposited at this temperature on a substrate having exposed metal and exposed dielectric in a substantially non-selective manner. In one implementation, a substrate having a recessed feature is provided, where the recessed feature has an exposed dielectric on the…
METHOD AND APPARATUS FOR GAS AND VAPOR DEPOSITION PRECURSOR DELIVERY HEATER
Granted: January 2, 2025
Application Number:
20250003065
A gas delivery apparatus having a heating block assembly, a heating element, a gas line, and a temperature-sensing switch. The heating block assembly includes a pair of heating blocks. Individual ones of the pair of heating blocks comprise a planar surface. The planar surface comprises first and second grooves that are substantially parallel. The first and second grooves extend along a length of the heating block. The planar surfaces of the individual ones of the pair of heating blocks…
VALVE MANIFOLD FOR SEMICONDUCTOR PROCESSING
Granted: December 19, 2024
Application Number:
20240420969
A valve manifold for use in a semiconductor processing tool comprises a manifold body, a purge gas inlet, a process gas inlet, a manifold outlet, a divert outlet, a first valve interface, a second valve interface, and a third valve interface. The first valve interface and the third valve interface each includes a first port, and a second port. The second valve interface includes a first port, a second port, a third port, and a fourth port.
AUTO BIT CHECK FOR PNEUMATIC VALVE VERIFICATION
Granted: October 31, 2024
Application Number:
20240360921
An auto bit check feature for pneumatic valve verification as coupled with a gas line that may be coupled with a semiconductor device process chamber. The gas line can be charged to keep a connected valve closed, where activation of a solenoid forces the gas to bleed out and open the valve. The pneumatic gas line may be is purged to keep a connected valve closed, where activation of the solenoid forces gas to flow in the line and apply a pressure to open the valve. One or more airlines…
MATCHING PRE-PROCESSING AND POST-PROCESSING SUBSTRATE SAMPLES
Granted: April 4, 2024
Application Number:
20240112961
Various embodiments herein relate to systems, methods, and media for matching pre-processing and post-processing substrate samples. In some embodiments, a computer program product for matching pre-processing and post-processing substrate samples is provided, the computer program product comprising a non-transitory computer-readable on which is provided computer-executable instructions for: receiving a plurality of samples associated with a first set of dimensions characterizing a…
LOW RESISTIVITY CONTACTS AND INTERCONNECTS
Granted: October 12, 2023
Application Number:
20230326790
Methods of filling features including metal and dielectric surfaces with conductive materials involve cleaning the metal surfaces with little or no damage to the dielectric surfaces. After cleaning, the feature may be exposed to one or more reactants to fill the feature with the conductive material in an atomic layer deposition (ALD) or chemical vapor deposition (CVD) process. Deposition may be selective or non-selective to the metal surface. In some embodiments, the filled feature is…
UV CURE FOR LOCAL STRESS MODULATION
Granted: February 9, 2023
Application Number:
20230038611
Localized stresses can be modulated in a film deposited on a bowed semiconductor substrate by selectively and locally curing the film by ultraviolet (UV) radiation. A bowed semiconductor substrate can be asymmetrically bowed. A UV-curable film is deposited on the front side or the backside of the bowed semiconductor substrate. A mask is provided between the UV-curable film and a UV source, where openings in the mask are patterned to selectively define exposed regions and non-exposed…
UV CURE FOR LOCAL STRESS MODULATION
Granted: February 9, 2023
Application Number:
20230038611
Localized stresses can be modulated in a film deposited on a bowed semiconductor substrate by selectively and locally curing the film by ultraviolet (UV) radiation. A bowed semiconductor substrate can be asymmetrically bowed. A UV-curable film is deposited on the front side or the backside of the bowed semiconductor substrate. A mask is provided between the UV-curable film and a UV source, where openings in the mask are patterned to selectively define exposed regions and non-exposed…
POST APPLICATION/EXPOSURE TREATMENTS TO IMPROVE DRY DEVELOPMENT PERFORMANCE OF METAL-CONTAINING EUV RESIST
Granted: February 2, 2023
Application Number:
20230031955
Various embodiments described herein relate to methods, apparatus, and systems for treating metal-containing photoresist to modify material properties of the photoresist. For instance, the techniques herein may involve providing a substrate in a process chamber, where the substrate includes a photoresist layer over a substrate layer, and where the photoresist includes metal, and treating the photoresist to modify material properties of the photoresist such that etch selectivity in a…
POST APPLICATION/EXPOSURE TREATMENTS TO IMPROVE DRY DEVELOPMENT PERFORMANCE OF METAL-CONTAINING EUV RESIST
Granted: February 2, 2023
Application Number:
20230031955
Various embodiments described herein relate to methods, apparatus, and systems for treating metal-containing photoresist to modify material properties of the photoresist. For instance, the techniques herein may involve providing a substrate in a process chamber, where the substrate includes a photoresist layer over a substrate layer, and where the photoresist includes metal, and treating the photoresist to modify material properties of the photoresist such that etch selectivity in a…
POST APPLICATION/EXPOSURE TREATMENTS TO IMPROVE DRY DEVELOPMENT PERFORMANCE OF METAL-CONTAINING EUV RESIST
Granted: February 2, 2023
Application Number:
20230031955
Various embodiments described herein relate to methods, apparatus, and systems for treating metal-containing photoresist to modify material properties of the photoresist. For instance, the techniques herein may involve providing a substrate in a process chamber, where the substrate includes a photoresist layer over a substrate layer, and where the photoresist includes metal, and treating the photoresist to modify material properties of the photoresist such that etch selectivity in a…
IMPEDANCE TRANSFORMATION IN RADIO-FREQUENCY-ASSISTED PLASMA GENERATION
Granted: December 29, 2022
Application Number:
20220415616
An apparatus for providing signals to a device may include one or more radiofrequency signal generators, and electrically-small transmission line, which couples signals from the one or more RF signal generators to the fabrication chamber. The apparatus may additionally include a reactive circuit to transform impedance of the electrically-small transmission line from a region of relatively high impedance-sensitivity to region of relatively low impedance-sensitivity.
METHODS TO ENABLE SEAMLESS HIGH QUALITY GAPFILL
Granted: December 1, 2022
Application Number:
20220384186
Methods and apparatuses for depositing material into high aspect ratio features are described herein. Methods involve depositing an oxide material using a hydrogen-containing oxidizing chemistry. Methods may also involve thermally treating deposited oxide material in the presence of hydrogen to remove seams within the deposited oxide material.
