POWER MEASUREMENT CIRCUIT
Granted: May 27, 2010
Application Number:
20100127755
A power measurement circuit and method are described. The circuit comprises: a transconductance rectifier arrangement including an input and configured to receive a periodically varying input voltage signal having an approximate 50% duty cycle; and an averaging filter for producing a time averaged DC output signal proportional to the mean square of the voltage at the input of the transconductance rectifier arrangement and representative of the average power of the input voltage signal…
ACCELERATED RESPONSE TO LOAD TRANSIENTS IN PFM DC-TO-DC CONVERTERS
Granted: May 20, 2010
Application Number:
20100123444
A pulse generator circuit in a DC-to-DC converter may be configured to generate pulses that have a frequency that increases in response to increases in the load on the DC-to-DC converter. The pulse generator circuit may be configured to cause each pulse to have a constant width. When the pulse reaches the end of the constant width and the magnitude of the current through an inductance in the converter is less than a threshold value, however, the pulse generator may be configured to…
SINGLE PASS INL TRIM ALGORITHM FOR NETWORKS
Granted: December 31, 2009
Application Number:
20090322575
A single-pass method of trimming a network, and a network manufactured according to the method, uses the assumption that the peak INL value is minimized by trimming all the structures in the network to a same target value based upon the boundary conditions of the discretely adjustable elements that make up the structures. Using this assumption, the number of targets that need to be simulated, can be greatly reduced making estimation of peak INL possible in a reasonable amount of testing…
METHOD FOR CLAMPING A SEMICONDUCTOR REGION AT OR NEAR GROUND
Granted: May 14, 2009
Application Number:
20090121770
A clamping circuit clamps a voltage received by an n-type semiconductor region without using a Schottky transistor. The clamping circuit includes a current mirror as well as first and second bipolar transistors. The current mirror receives a first current and supplies a second current in response. The first current is received by the first bipolar transistor, and the second current is received by the second bipolar transistor. The difference between the base-emitter junction voltages of…
MULTIPLE OUTPUT AMPLIFIERS AND COMPARATORS
Granted: March 5, 2009
Application Number:
20090058380
An amplifier/comparator includes a multitude of output stages all sharing the same input stage. One or more of the output stages are amplification stages and have compensated output signals. A number of other output stages are not compensated and provide comparison signals. Each uncompensated output stage is adapted to switch to a first state if it detects a first input signal as being greater than a second signal, and further to switch to a second state if it detects the first input…
Bidirectional power conversion with multiple control loops
Granted: July 10, 2008
Application Number:
20080164853
Bidirectional power conversion systems provide the ability to change power attributes to and from a component. Current bidirectional power conversion systems use a unidirectional power converter for each direction. The integration of the two normally independent power converters results in a bidirectional power converter with nearly half the size, weight, volume, cost and complexity. Described are embodiments of bidirectional power conversion systems that allow power transfer between two…
Circuits and methods for adjustable peak inductor current and hysteresis for burst mode in switching regulators
Granted: February 7, 2008
Application Number:
20080030178
Switching regulator circuits and methods are provided for regulating output voltage that include an adjustable minimum peak inductor current level and adjustable burst comparator hysteresis for Burst Mode operation in switching regulators. Control over minimum peak inductor current level and burst comparator hysteresis is achieved during Burst Mode operation by allowing external user control of the burst threshold level and the burst comparator hysteresis. A single user-accessible input…
Range compression in oversampling analog-to-digital converters
Granted: January 10, 2008
Application Number:
20080007435
An analog-to-digital converter according to the invention is provided. The analog-to-digital converter preferably includes an analog input signal, a first reference signal, a second reference signal, and a range compression signal. The range compression signal is preferably characterized by a magnitude greater than the first reference signal and smaller than the second reference signal. In addition, when the analog input signal is sampled N times and the range compression signal is…
Range compression in oversampling analog-to-digital converters using differential input signals
Granted: January 10, 2008
Application Number:
20080007442
An analog-to-digital converter according to the invention is provided. The analog-to-digital converter preferably includes an analog input signal, a first reference signal, a second reference signal, and a range compression signal. The range compression signal is preferably characterized by a magnitude greater than the first reference signal and smaller than the second reference signal. In addition, when the analog input signal is sampled N times and the range compression signal is…
ADAPTIVE CURRENT REVERSAL COMPARATOR
Granted: October 25, 2007
Application Number:
20070247130
An adaptive current reversal comparator for synchronous switching regulator comparison circuit for use in a switching regulator is provided. The comparison circuit includes a voltage offset that is used at least in part to compensate for a propagation delay of the comparison circuit. The switching regulator includes an inductor and a synchronous transistor. The comparison circuit also includes a timing circuit that provides a threshold amount of time and an offset adjustment circuit. The…
ULTRA-WIDEBAND CONSTANT GAIN CMOS AMPLIFIER
Granted: August 16, 2007
Application Number:
20070188240
Circuitry and methods for improved amplifiers with large bandwidth and constant gain are provided. The combination of a synthetic inductive drain load and a bridged-T matching network provide amplifiers that can drive a substantial capacitive load with the above mentioned improvements over prior amplifiers. Additionally, circuits presented allow for improved rise time and insensitivity to temperature variations.
Circuits and methods for providing multiple phase switching regulators which employ the input capacitor voltage signal for current sensing
Granted: March 29, 2007
Application Number:
20070069705
Circuits and methods to correct the load sharing in multiphase switching regulators are provided. Using these systems and methods, the input capacitor voltage signal can be sampled and used for current sensing of the regulator's stages. Differences in the amount of output current for a converter stage can then be determined. Corrections needed to equalize the output current of the converter stages can then be determined and carried out.
Flashless lead frame with horizontal singulation
Granted: November 30, 2006
Application Number:
20060267163
A lead frame is configured for use with a singulation apparatus that eliminates flash. A die pad is attached to sides of the frame by tie bars and peripheral portions. The peripheral portions have cutout sections defining openings that are bridged by lead frame segments. The apparatus applies a downward force to the lead frame segments and translates the downward force to a horizontal force applied to the tie bars. The singulation process confines movement of the lead frame metal to…
Analog signal sampling system and method having reduced average input current
Granted: November 2, 2006
Application Number:
20060244650
A novel sampling system having a sampling device responsive to an analog input signal and a reference signal for providing corresponding charges. A switching circuit is provided to supply the input signal and the reference signal to the sampling device. The switching circuit is controlled to supply the input signal and the reference signal to the sampling device so as provide a substantially zero total charge taken by the sampling device from a source of the input signal. One application…
High voltage MOS transistor with up-retro well
Granted: April 6, 2006
Application Number:
20060071269
A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The implanted dopants diffuse into the epitaxial layer from the substrate during the formation of the epitaxial layer and subsequent heating steps. The implanted dopants increase the doping concentration in a lower portion of the…
FLOATING GATE NONVOLATILE MEMORY CIRCUITS AND METHODS
Granted: September 15, 2005
Application Number:
20050201179
A non-volatile memory element is operated, in part, in two phases. During the first phase, a voltage is applied to a first node coupled to the nonvolatile memory element to generate an initial voltage. During the second phase, a voltage is coupled through at least one capacitor to charge pump the initial voltage to a level sufficient for programming or erasing the non-volatile memory element.
Low voltage high gain amplifier circuits
Granted: January 13, 2005
Application Number:
20050007195
In one embodiment, the present invention provides an amplifier circuit including a cascode input stage coupled to a differential stage. In another embodiment, an amplifier includes a differential stage coupled to a common gate stage. Embodiments of the present invention also include an improved low voltage amplifier using a 3-stage topology including a wide-swing folded-cascode input stage followed by a differential gain stage which provides improved gain and output compliance.…
Circuits and methods for synchronizing non-constant frequency switching regulators with a phase locked loop
Granted: January 6, 2005
Application Number:
20050001602
Methods for synchronizing non-constant frequency switching regulators with a phase locked loop are disclosed. The methods enable non-constant frequency switching regulators to be synchronized with a phase locked loop to achieve constant frequency operation in steady state while retaining the advantages of non-frequency operation to improve transient response and operate over a wider range of duty cycles. In addition, the methods enable multiple non-constant frequency regulators to be…
High voltage MOS transistor with gate extension
Granted: November 18, 2004
Application Number:
20040227204
A high voltage MOS transistor with a gate extension that has a reduced electric field in the drain region near the gate is provided. The high voltage MOS transistor includes a first and second gate layers, and a dielectric layer between the gate layers. The first and second gate layers are electrically coupled togther and form the gate of the transistor. The second gate layer extends over the drain of the transistor above the dielectric and gate oxide layers to form the gate extension.…
High voltage MOS transistor with up-retro well
Granted: November 11, 2004
Application Number:
20040224472
A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The implanted dopants diffuse into the epitaxial layer from the substrate during the formation of the epitaxial layer and subsequent heating steps. The implanted dopants increase the doping concentration in a lower portion of the…
