High-speed, current driven latch
Granted: August 5, 2004
Application Number:
20040150450
A high-speed, current-driven latch is provided. The latch conducts a current and includes an output, a SET circuit and a RESET circuit. The output is variable between a first state and a second state. The SET circuit conducts the current present in the latch at the first state such that the SET circuit is maintained close to a level required to change the output of the transistor from the first to the second level, and the RESET circuit conducts the current at the second level such that…
Circuits and techniques for capacitor charging circuits
Granted: July 8, 2004
Application Number:
20040130299
The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The…
Constant-current/constant-voltage circuit architecture
Granted: May 27, 2004
Application Number:
20040100243
Methods and circuits implementing a constant-current/constant-voltage circuit architecture are provided. The methods and circuits preferably provide a charging system that provides current to a load using a fixed current until the load is charged. When the load is charged, the methods and circuits preferably provide a variable current to the load in order to maintain the voltage level across the load. This variable current varies according to the voltage across the load. In one…
Circuits and methods for a variable over sample ratio delta-sigma analog-to-digital converter
Granted: May 13, 2004
Application Number:
20040090355
Circuits and methods for a delta-sigma analog-to-digital converter having a variable oversample ratio to produce a constant fullscale output at reduced circuit complexity, die area, and power dissipation are provided. The circuits and methods consist of scaling the digital input to the digital filter with a decoder whose size depends on the number of oversample ratios allowed by the analog-to-digital converter. The digital filter is implemented as a comb filter having a cascade of N…
Circuitry and methods for improving the performance of a light emitting element
Granted: April 15, 2004
Application Number:
20040070351
Light emitting elements with preselected or adjustable impedance characteristics are provided. Embodiments using a preselected impedance characteristic obtain significant performance benefits compared to the prior art. Embodiments having an adjustable impedance may alter the impedance associated with the light emitting component such that it has a substantially constant resistive or reactive impedance that improves certain performance attributes. This solution virtually eliminates the…
Constant-current/constant-voltage circuit architecture
Granted: October 23, 2003
Application Number:
20030197497
Methods and circuits implementing a constant-current/constant-voltage circuit architecture are provided. The methods and circuits preferably provide a charging system that provides current to a load using a fixed current until the load is charged. When the load is charged, the methods and circuits preferably provide a variable current to the load in order to maintain the voltage level across the load. This variable current varies according to the voltage across the load. In one…
METHODS AND APPARATUS FOR POWER MEASURING RECEIVER
Granted: August 21, 2003
Application Number:
20030155904
Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the…
High voltage MOS transistor with up-retro well
Granted: July 10, 2003
Application Number:
20030127689
A high voltage MOS transistor is provided that is compatible with low-voltage, sub-micron CMOS and BiCMOS processes. The high voltage transistor of the present invention has dopants that are implanted into the substrate prior to formation of the epitaxial layer. The implanted dopants diffuse into the epitaxial layer from the substrate during the formation of the epitaxial layer and subsequent heating steps. The implanted dopants increase the doping concentration in a lower portion of the…
RMS-to-DC converter with fault detection and recovery
Granted: May 22, 2003
Application Number:
20030097239
A circuit that provides the root-mean-square (RMS) value of an input signal and that detects and independently recovers from an output fault condition is provided. The circuit includes reconfigurable circuitry that changes from normal operating mode to fault recovery mode when an output fault is detected. During fault recovery mode, the circuit provides a modified output signal that allows independent recovery from an output fault condition. Once recovery is complete, the circuit returns…
Circuits and techniques for capacitor charging circuits
Granted: May 15, 2003
Application Number:
20030090240
The present invention provides a capacitor charging circuit that efficiently charges capacitive loads. In particular, circuits and techniques are preferably provided for using current from both the primary and secondary windings of a transformer to control ON-time and OFF-time of a switch. This arrangement preferably yields an adaptable ON-time and adaptable OFF-time switch that is capable of rapidly charging capacitor loads ranging from as low as zero volts to several hundred volts. The…
ANALOG COMPUTATION CIRCUITS USING SYNCHRONOUS DEMODULATION AND POWER METERS AND ENERGY METERS USING THE SAME
Granted: May 1, 2003
Application Number:
20030080886
The present invention relates to analog computation circuits that use a synchronous demodulator topology which can be configured to perform arithmetic computation, power measurements, and/or energy measurement of various analog signals. The computation circuits have circuitry that generates an output signal based on the values of a first input signal, a second input signal, and a reference signal. This invention provides accurate computation of two signals by using modulation circuitry…
High voltage MOS transistor with gate extension
Granted: February 27, 2003
Application Number:
20030038319
A high voltage MOS transistor with a gate extension that has a reduced electric field in the drain region near the gate is provided. The high voltage MOS transistor includes a first and second gate layers, and a dielectric layer between the gate layers. The first and second gate layers are electrically coupled together and form the gate of the transistor. The second gate layer extends over the drain of the transistor above the dielectric and gate oxide layers to form the gate extension.…
Cancellation of slope compensation effect on current limit
Granted: February 6, 2003
Application Number:
20030025484
A current-mode switching regulator that maintains a substantially constant maximum current limit over a virtually full range of duty cycles is provided. The regulator has a control circuit that includes a buffer circuit, an adjustable voltage clamp circuit, and a slope compensation circuit. The buffer circuit isolates a control signal from capacitive loading associated with control circuit. The threshold level of the adjustable voltage clamp circuit varies with respect to the amount of…
Circuits and methods for synchronizing non-constant frequency switching regulators with a phase locked loop
Granted: December 5, 2002
Application Number:
20020180413
Methods for synchronizing non-constant frequency switching regulators with a phase locked loop are disclosed. The methods enable non-constant frequency switching regulators to be synchronized with a phase locked loop to achieve constant frequency operation in steady state while retaining the advantages of non-frequency operation to improve transient response and operate over a wider range of duty cycles. In addition, the methods enable multiple non-constant frequency regulators to be…
Methods and apparatus for power measuring receiver
Granted: November 28, 2002
Application Number:
20020175668
Power measuring receiver (PMR) methods and apparatus for measuring power of signals are provided in which a high frequency measuring circuit (HFMC), a conversion measuring circuit (CMC), and an intermediate frequency measuring circuit (IFMC) work in conjunction with each other to measure a wide power range of signals. The HFMC may measure relatively high power signals at high frequency. The CMC may convert the high frequency signal into an intermediate frequency signal so that both the…
Circuits and methods for controlling load sharing by multiple power supplies
Granted: November 7, 2002
Application Number:
20020163255
Circuits and methods for controlling load sharing by multiple power supplies are provided. In preferred embodiments, load share controllers utilize multiple voltage control loops to monitor the output voltages that are being provided by multiple power supplies connected to a load. These voltage control loops each generate a voltage control voltage that is proportional to the difference between the actual output voltage of the corresponding power supply and the desired output voltage. The…
Constant-current/constant-voltage circuit architecture
Granted: October 24, 2002
Application Number:
20020153871
Methods and circuits implementing a constant-current/constant-voltage circuit architecture are provided. The methods and circuits preferably provide a charging system that provides current to a load using a fixed current until the load is charged. When the load is charged, the methods and circuits preferably provide a variable current to the load in order to maintain the voltage level across the load. This variable current varies according to the voltage across the load. In one…
CIRCUITS AND METHODS FOR SYNCHRONIZING NON-CONSTANT FREQUENCY SWITCHING REGULATORS WITH A PHASE LOCKED LOOP
Granted: October 10, 2002
Application Number:
20020145409
Methods for synchronizing non-constant frequency switching regulators with a phase locked loop are disclosed. The methods enable non-constant frequency switching regulators to be synchronized with a phase locked loop to achieve constant frequency operation in steady state while retaining the advantages of non-frequency operation to improve transient response and operate over a wider range of duty cycles. In addition, the methods enable multiple non-constant frequency regulators to be…
High voltage MOS transistor
Granted: August 29, 2002
Application Number:
20020117714
The present invention provides high voltage MOS transistors that have a high breakdown voltage and a low specific ON resistance in the drain. High voltage MOS transistors of the present invention include a source region and a drain region formed in an body region. The drain region includes a low doped extension region, a higher doped base region, and a more highly doped type region. The extension region of the drain extends toward the gate, further than the base region. The extension…
Active pullup circuitry for open-drain signals
Granted: May 9, 2002
Application Number:
20020053905
Circuitry and methods are provided for reducing rise time associated with signals on an open-drain or open-collector signal line. Signal line voltage is monitored to determine if the signal line is being pulled LOW. If the signal line is not being pulled LOW, as indicated by signal line voltage exceeding a threshold level, additional pullup current is provided. The additional current may be provided gradually in relation to the signal line voltage, or may be provided in full whenever…
