LSI Patent Applications

Generating Single-Slice Pictures Using Paralellel Processors

Granted: May 17, 2012
Application Number: 20120121018
A video encoding system generates (e.g., H.264) single-slice pictures using parallel processors. Each picture is divided horizontally into multiple segments, where each different parallel processor processes a different segment. Each parallel processor (other than the first parallel processor of the uppermost segment) only partially processes the macroblocks in the first row of its segment. Subsequently, a final processor completes the processing of the partially encoded, first-row…

UTILIZING INFORMATION FROM A NUMBER OF SENSORS TO SUPPRESS ACOUSTIC NOISE THROUGH AN AUDIO PROCESSING SYSTEM

Granted: May 17, 2012
Application Number: 20120121097
A method includes associating a spatially separate audio sensor and/or a vibration sensor with an audio processing system having one or more audio sensor(s) associated therewith. The spatially separate audio sensor is on a remote location distinct from that of the one or more audio sensor(s). The method also includes capturing information uniquely associated with an external environment of the audio processing system through the spatially separate audio sensor and/or the vibration sensor…

METHOD FOR DETERMINISTIC SAS DISCOVERY AND CONFIGURATION

Granted: May 17, 2012
Application Number: 20120124256
The present invention is directed to a method for deterministic Serial Attached Small Computer System Interface (SAS) discovery and configuration. The method includes transmitting a Serial Management Protocol (SMP) DISCOVER Request from a node of a SAS domain to each expander of the SAS domain. The method further includes receiving SMP DISCOVER Responses at the node from each expander of the SAS domain. The method further includes comparing BROADCAST (CHANGE) RECEIVED (BCR) counts…

METHODS AND STRUCTURE FOR DETERMINING CACHE SIZE IN A STORAGE SYSTEM

Granted: May 17, 2012
Application Number: 20120124295
Methods and structure for automated determination and reconfiguration of the size of a cache memory in a storage system. Features and aspects hereof generate historical information regarding frequency of hits on cache lines in the cache memory. The history maintained is then analyzed to determine a desired cache memory size. The historical information regarding cache memory usage may be communicated to a user who may then direct the storage system to reconfigure its cache memory to a…

METHODS AND STRUCTURE FOR TUNING STORAGE SYSTEM PERFORMANCE BASED ON DETECTED PATTERNS OF BLOCK LEVEL USAGE

Granted: May 17, 2012
Application Number: 20120124319
Methods and structure within a storage system for tuning performance of the storage system based on monitored block level access within the storage system. Block level access, either in cache memory or on the storage devices of the storage system, is monitored to detect patterns of access and/or data that correspond to an identified host system program. Based on the identified host system program, a profile of desired storage device configuration information is selected by the storage…

INPUT/OUTPUT CORE DESIGN AND METHOD OF MANUFACTURE THEREFOR

Granted: May 17, 2012
Application Number: 20120119785
One aspect provides an input/output cell. The input/output cell, in one example, includes an input/output layout boundary delineated on a substrate, wherein the input/output layout boundary defines a first side parallel and opposing a second side, a third side parallel and opposing a fourth side, wherein the first and second sides are substantially perpendicular the third and fourth sides. The input/output cell, in this example, further includes input/output transistors positioned within…

Managing a Storage Cache Utilizing Externally Assigned Cache Priority Tags

Granted: May 10, 2012
Application Number: 20120117328
A method for caching data in a storage medium implementing tiered data structures may include storing a first portion of critical data at the instruction of a storage control module. The first portion of critical data may be separated into data having different priority levels based upon at least one data utilization characteristic associated with a file system implemented by the storage control module. The method may also include storing a second portion of data at the instruction of…

METHODS AND STRUCTURE FOR NEAR-LIVE REPROGRAMMING OF FIRMWARE IN STORAGE SYSTEMS USING A HYPERVISOR

Granted: May 10, 2012
Application Number: 20120117562
Methods and structure for reprogramming firmware in a storage controller using a virtual machine management (VMM) environment. A storage process (current firmware) in the storage controller operates in a current virtual machine (VM) under control of a hypervisor. Reprogrammed (new) firmware is loaded into a new virtual machine under control of the hypervisor. The new firmware initializes and directs the current firmware to quiesce its processing. The new firmware also requests the…

METHOD AND SYSTEM FOR FIRMWARE ROLLBACK OF A STORAGE DEVICE IN A STORAGE VIRTUALIZATION ENVIRONMENT

Granted: May 10, 2012
Application Number: 20120117555
A method and controller device for upgrading the firmware in a virtualized storage environment having a first storage controller and a second storage controller, wherein each storage controller includes a first virtual machine, at least one second virtual machine and a storage device. The method includes upgrading the current firmware of the first virtual machine in the first storage controller to a new firmware version, upgrading the current firmware of the second virtual machine in the…

LATENCY REDUCTION ASSOCIATED WITH A RESPONSE TO A REQUEST IN A STORAGE SYSTEM

Granted: May 10, 2012
Application Number: 20120117320
A method includes segmenting a virtual volume into an active area configured to map to a first type of storage and a non-active area configured to map to a second type of storage through a storage virtualization engine. The second type of storage includes data associated with a host device and the first type of storage includes point-in-time images corresponding to the data associated with the host device. The first type of storage offers a higher performance than that of the second type…

MULTI-STAGE INTERCONNECTION NETWORKS HAVING FIXED MAPPINGS

Granted: May 10, 2012
Application Number: 20120117295
In one embodiment, a multistage interconnection network (MIN) has two or more configurable stages, each stage having a plurality of switches. The network has one or more unused input terminals, each mapped using fixed switch connections to an unused output terminal. The network also has a set of used input terminals that are selectively mapped to a set of used output terminals based on values of control signals supplied to the stages. Each stage receives a different control signal, and…

MULTI-STAGE INTERCONNECTION NETWORKS HAVING SMALLER MEMORY REQUIREMENTS

Granted: May 10, 2012
Application Number: 20120113984
In one embodiment, a multistage interconnection network (MIN) has two or more configurable stages, each stage having a plurality of switches. The network has one or more unused input terminals, each mapped using fixed switch connections to an unused output terminal. The network also has a set of used input terminals that are selectively mapped to a set of used output terminals based on values of control signals supplied to the stages. Each stage receives a different control signal, and…

ALUMINUM BOND PADS WITH ENHANCED WIRE BOND STABILITY

Granted: May 10, 2012
Application Number: 20120111927
A method of forming an electronic device bond pad includes providing an electronic device substrate having an Al bond pad located thereover. An aluminum layer is formed over the Al bond pad. A metal layer is formed located between the Al bond pad and the aluminum layer. The metal layer comprises one or more of Ni, Pd and Pt and has a total concentration of Ni, Pd and/or Pt of at least about 50 wt. %. A gold bond wire may be attached to the aluminum layer.

SPEECH SUBSTITUTION OF A REAL-TIME MULTIMEDIA PRESENTATION

Granted: May 3, 2012
Application Number: 20120105719
Disclosed are a method, an apparatus and/or system of speech substitution of a real-time multimedia presentation on an output device. In one embodiment, a method includes processing a multimedia signal of a multimedia presentation, using a processor. The multimedia signal includes a video signal and an audio signal, such that the audio signal is substitutable with another audio signal based on a preference of a user. The method also includes substituting the audio signal with another…

Motion Estimation for a Video Transcoder

Granted: May 3, 2012
Application Number: 20120106642
A video transcoder for converting an encoded input video bit-stream having one spatial resolution into an encoded output video bit-stream having a lower spatial resolution, wherein motion-vector dispersion observed at the higher spatial resolution is quantified and used to configure the motion-vector search at the lower spatial resolution. For example, for video-frame areas characterized by relatively low motion-vector dispersion values, the motion-vector search may be performed over a…

MANAGEMENT OF DETECTED DEVICES COUPLED TO A HOST MACHINE

Granted: May 3, 2012
Application Number: 20120110211
In one embodiment, a method includes detecting a coupling of a device to an interface of the host machine. The method also includes determining, through an operating system of the host machine whether the device coupled to the interface of the host machine is same as another device that is formerly coupled to the interface of the host machine as indicated in a topology file of the operating system. In addition, the method includes modifying the topology file maintained in the operating…

PERFORMING DATA WRITES IN PARITY PROTECTED REDUNDANT STORAGE ARRAYS

Granted: May 3, 2012
Application Number: 20120110377
A first and a second physical disk identifier, a physical Logical Block Address (LBA), a data length, and a span identifier are calculated from a data write operation. A first request command frame is created for retrieving the existing data block from the storage array, the first request command frame including at least one of the calculated parameters. At least one second request command frame is created for retrieving the at least one existing parity data block from the storage array,…

METHODS AND STRUCTURE FOR ON-CHIP CLOCK JITTER TESTING AND ANALYSIS

Granted: April 26, 2012
Application Number: 20120098571
Methods and structure for on-chip self-test of clock jitter for an application clock signal generated within an integrated circuit (IC). Features and aspects hereof provide for acquisition of samples of an application clock signal within the IC and counting the number of samples having a predetermined value. The count is compared to acceptable limits range values to generate a pass/fail signal of the IC use by external automated. A sample clock is generated based on the reference clock…

COMMUNICATIONS SYSTEM SUPPORTING MULTIPLE SECTOR SIZES

Granted: April 26, 2012
Application Number: 20120099670
In one embodiment, a configurable communications system accommodates a plurality of different transmission word sizes. In a transmit path, the system inserts a number of padding bits corresponding to missing user-data bits onto the end of an input data sequence to generate a set of data having N bits. The N bits are interleaved and error-correction (EC) encoded to generate parity bits corresponding to an EC codeword. The parity bits are de-interleaved and multiplexed with the input data…

SERIAL ATTACHED SMALL COMPUTER SYSTEM INTERFACE (SAS) DOMAIN ACCESS THROUGH A UNIVERSAL SERIAL BUS INTERFACE OF A DATA PROCESSING DEVICE

Granted: April 26, 2012
Application Number: 20120102251
A method, an apparatus and/or a system of serial attached small computer system interface (SAS) domain access through a universal serial bus (USB) interface of a data processing device. A method includes communicatively coupling a serial attached small computer system interface (SAS) domain to the data processing device through the universal serial bus (USB) interface of the data processing device via an expander device. The method also includes accessing a SAS device of the SAS domain…