FAST PATH SCSI IO
Granted: December 2, 2010
Application Number:
20100306420
A hardware automated IO path, comprising a message transport unit for transporting an IO request to a local memory via a DMA operation and determining a LMID for associating with a request descriptor of the IO request; a fastpath engine for validating the request descriptor and creating a fastpath descriptor based on the request descriptor; a data access module for performing an IO operation based on the fastpath descriptor and posting a completion message into the fastpath completion…
SYSTEM AND METHOD FOR MAINTAINING THE SECURITY OF MEMORY CONTENTS AND COMPUTER ARCHITECTURE EMPLOYING THE SAME
Granted: December 2, 2010
Application Number:
20100306519
A secure memory system and a method of maintaining the security of memory contents. One embodiment of the system includes: (1) a security control module configured to transmit a system memory secure mode signal and processor secure mode signal to place the system in a secure mode, (2) a secure memory bridge coupled to the security control and system memory and configured to encrypt and decrypt data associated with the system memory based on a state of the system memory secure mode signal…
TRANSMITTING DATA OVER A MOBILE TELECOMMUNICATION NETWORK
Granted: December 2, 2010
Application Number:
20100304711
A network is configured to charge fees at a first rate for transmitting data of a first type and fees at a second, less expensive, rate for transmitting data of a second type. In a first embodiment, at least a portion of the original data transmitted is converted from the first type into the second type before sending the processed data to the network. A corresponding conversion from the second type into the first type is performed at the receiver's side to obtain re-created data from…
METHODS AND APPARATUS FOR INTERCONNECTING SAS DEVICES USING EITHER ELECTRICAL OR OPTICAL TRANSCEIVERS
Granted: November 25, 2010
Application Number:
20100296815
Methods and systems for encoding and/or decoding digital signals representing serial attached SCSI (SAS) out of band (OOB) signals exchanged over an optical communication between two SAS devices. A SAS OOB signal to be transmitted from a first SAS device to a second SAS device is first encoded as a digitally encoded signal representing the analog SAS OOB signal and then transmitted over an optical communication medium to another SAS device. A receiving SAS device coupled to an optical…
POWER MANAGMENT FOR STORAGE DEVICES
Granted: November 25, 2010
Application Number:
20100299549
Methods and systems are provided for managing power allocation to a SAS target coupled with a SAS initiator through a SAS expander. The expander exchanges messages with the target to manage the power allocation to the target. The target transmits a power request message through the expander to the initiator. In some embodiments, the initiator transmits a power request received message to the expander. The expander may then transmit a power grant message to the target in response to…
ELECTRONIC PRESSURE-SENSING DEVICE
Granted: November 18, 2010
Application Number:
20100288048
An electronic pressure-sensing device 100 comprising a transistor 105 located on a substrate 110. The device also comprises a linker arm 115 that has a tip 120 which is configured to touch a contact region 125 of the substrate that is near the transistor. The device also comprises a pressure converter 130 that is mechanically coupled to the linker arm. The pressure converter is configured to cause, in response to a pressure change, the tip to impart a force capable of changing an…
METHOD AND APPARATUS OF CORE TIMING PREDICTION OF CORE LOGIC IN THE CHIP-LEVEL IMPLEMENTATION PROCESS THROUGH AN OVER-CORE WINDOW ON A CHIP-LEVEL ROUTING LAYER
Granted: November 18, 2010
Application Number:
20100289112
A method and/or an apparatus of core timing prediction is disclosed. In one embodiment, a method may include generating a core timing model of a core logic that is accurately transferable to any chip-level integration process. The method may reduce performance degradation and/or performance variation of the core logic caused by a number of interactions between core logic components and chip-level components in the chip-level integration process. In addition, the core timing model of the…
CONTROLLER AND METHOD FOR STATISTICAL ALLOCATION OF MULTICHANNEL DIRECT MEMORY ACCESS BANDWIDTH
Granted: November 18, 2010
Application Number:
20100293304
A DMA controller and a method for statistical allocation of multichannel DMA bandwidth. In one embodiment, the DMA controller includes: (1) channel interfaces including respective counters and configured to provide request signals, priority signals and counter value signals representing current values of the counters at a given time and (2) a grant control unit coupled to the channel interfaces and configured to grant DMA access to one of the channel interfaces based on values of the…
MEMORY DEVICE CONTROL FOR SELF-REFRESH MODE
Granted: November 18, 2010
Application Number:
20100293326
To ensure that a memory device operates in self-refresh mode, the memory controller includes (1) a normal-mode output buffer for driving a clock enable signal CKE onto the memory device's CKE input and (2) a power island for driving a clock enable signal CKE_prime onto that same input. To power down the memory controller, the normal-mode output buffer drives signal CKE low, then the power island drives signal CKE_prime low, then the memory controller (except for the power island) is…
AN INTEGRATED COMPUTATION AND COMMUNICATION SYSTEM, A FRAMED INTERFACE THEREFOR AND A METHOD OF OPERATING THEREOF
Granted: November 11, 2010
Application Number:
20100283711
An integrated computational and communication system having modular components, a framed user interface and a method of operation an integrated computational and communication system are provided. In one embodiment, the integrated computational and communication system includes: (1) an input component configured to receive input data from a user, (2) an output component configured to provide output data to the user, (3) a controller configured to provide computational functionality and…
MEMORY DEVICE CONTROL FOR SELF-REFRESH MODE
Granted: November 4, 2010
Application Number:
20100278000
In memory circuitry, to ensure that a memory device, such as a DDR3 RDIMM, safely operates in self-refresh mode while the memory controller is powered down and off, the memory device's clock enable (CKE) input is connected to both (i) the CKE signal applied by the memory controller and (ii) a termination voltage provided by the power module. To power down the memory controller, the memory controller drives the CKE signal low, then the power module drives the termination voltage low, then…
UNIFIED SUPPORT FOR WEB BASED ENTERPRISE MANAGEMENT ("WBEM") SOLUTIONS
Granted: November 4, 2010
Application Number:
20100281101
Methods and systems for support a unified Web Based Enterprise Management (“WBEM”) solution is provided. A first processing element for generating first HTTP content data is provided such that a response to a non-Common Information Model (“CIM”) request is based on the first HTTP content data. A second processing element for generating second HTTP content data is also provided such that another response to a CIM request is based on the second HTTP content data. At least one of…
CONTROLLING AN OPTICAL-DISC READER USING SURFACE MARKS
Granted: November 4, 2010
Application Number:
20100278021
An optical-disc player having a reader and a controller. The reader derives out-of-band information from surface marks of an optical disc, where the controller controls operations of the reader based on the derived information. The controlled operations may involve the reading and rendering of embedded data of the optical disc. For example, a person writes the words “Spanish” and “widescreen” on the surface of a DVD with a marker and inserts the DVD in a DVD player. The DVD…
MANIPULATING FILL PATTERNS DURING ROUTING
Granted: October 28, 2010
Application Number:
20100270671
A CAD tool that supports an overlay-enabling operating mode. After the overlay-enabling operating mode is entered, the layout-editing facility permits modifications to the interconnect structure of an integrated circuit that is being designed regardless of whether a particular modification interferes with an existing pattern of metal fill. For example, a new signal wire can be added to electrically connect two specified points in the layout in a manner that causes the wire to cross over…
MANAGING STORAGE ARRAY OPERATIONS THAT CAUSE LOSS OF ACCESS TO MIRRORED DATA
Granted: October 28, 2010
Application Number:
20100274967
Storage array operations, such as code downloads and other operations of the type that cause loss of access to portions of the storage array, are managed in a manner that preserves access to other portions of the storage array so that other storage array operations, such as data synchronization, can continue.
ACTIVE-ACTIVE SUPPORT OF VIRTUAL STORAGE MANAGEMENT IN A STORAGE AREA NETWORK ("SAN")
Granted: October 28, 2010
Application Number:
20100274969
Methods and apparatuses are provided for active-active support of virtual storage management in a storage area network (“SAN”). When a storage manager (that manages virtual storage volumes) of the SAN receives data to be written to a virtual storage volume from a computer server, the storage manager determines whether the writing request may result in updating a mapping of the virtual storage volume to a storage system. When the writing request does not involve updating the mapping,…
METHOD AND AN APPARATUS FOR EVALUATING SMALL DELAY DEFECT COVERAGE OF A TEST PATTERN SET ON AN IC
Granted: October 14, 2010
Application Number:
20100262394
A method and an apparatus for evaluating SDDC of a test pattern set are disclosed. In one embodiment, the method includes: (1) selecting a transition fault of an IC detected by a test pattern set, the transition fault occurring at a fault site of the IC, (2) identifying path delays of a longest testable path and a longest tested path of the IC, wherein both the longest testable path and the longest tested path include the fault site, (3) determining a SDD detection probability for both…
TEST CIRCUIT AND METHOD FOR TESTING OF INFANT MORTALITY RELATED DEFECTS
Granted: October 14, 2010
Application Number:
20100262876
The disclosure provides embodiments of ICs and a method of testing an IC. In one embodiment, an IC includes: (1) a functional logic path having a node and at least one sequential logic element and (2) test circuitry coupled to the functional logic path and having a delay block, the test circuitry configured to form a testable path including the delay block and the node in response to a test mode signal, wherein a delay value of the delay block is selected to detect a small delay defect…
SYSTEM AND METHOD FOR CLOCK OPTIMIZATION TO ACHIEVE TIMING SIGNOFF IN AN ELECTRONIC CIRCUIT AND ELECTRONIC DESIGN AUTOMATION TOOL INCORPORATING THE SAME
Granted: October 14, 2010
Application Number:
20100262939
A system and method for clock optimization to achieve timing signoff in an electronic circuit and an EDA tool that embodies the system or the method. In one embodiment, the system includes: (1) a clock cell identifier/sorter configured to identify at least some clock cells in a clock network associated with an electronic circuit design and sort the cells according to breadth, (2) a slack analyzer associated with the clock cell identifier/sorter and configured to identify flops that are…
Automated Timing Optimization
Granted: October 14, 2010
Application Number:
20100262941
A method for reducing a timing violation in a negative slack path from an integrated circuit design, by identifying the negative slack path in the integrated circuit design with a processor, and then identifying positive slack paths by determining timing slack for the paths that are disposed before and after the negative slack path. A prediction is made as to whether margin can be obtained from the positive slack paths by performing additional timing optimization on the positive slack…
