Maxim Integrated Patent Applications

CURRENT BASED RESONANT FREQUENCY TRACKING SYSTEM

Granted: January 25, 2024
Application Number: 20240030843
A current based resonant frequency tracking system and methods can include: providing a haptic pattern with a processor, the haptic pattern including both a haptic pattern start time and a haptic pattern stop time; driving a linear resonant actuator according to the haptic pattern with an amplifier coupled to the processor, and the amplifier having an output coupled to the linear resonant actuator; detecting a current sense signal having a back electromotive force current after the…

CURRENT BASED RESONANT FREQUENCY TRACKING SYSTEM

Granted: January 25, 2024
Application Number: 20240030843
A current based resonant frequency tracking system and methods can include: providing a haptic pattern with a processor, the haptic pattern including both a haptic pattern start time and a haptic pattern stop time; driving a linear resonant actuator according to the haptic pattern with an amplifier coupled to the processor, and the amplifier having an output coupled to the linear resonant actuator; detecting a current sense signal having a back electromotive force current after the…

AUTO-CALIBRATION SYSTEMS AND METHODS FOR REDUCING AMPLIFER OFFSET

Granted: December 21, 2023
Application Number: 20230412133
Systems and methods reduce unwanted effects caused by mismatch in amplifier circuits having components that are trimmable during and post-production to minimize DC offset. Various embodiments of the invention trim out amplifier mismatch by determining trim codes for two or more phases of operation of an amplifier circuit and use those trim codes to determine a final trim code for use in regular operation.

Secure authentication based on physically unclonable functions

Granted: November 2, 2023
Application Number: 20230353550
The invention relates to an electronic device, and more particularly, to systems, devices and methods of authenticating the electronic device using a challenge-response process that is based on a physically unclonable function (PUF). The electronic device comprises a PUF element, a processor and a communication interface. The PUF element generates an input signal based on at least one PUF that has unique physical features affected by manufacturing variability. A challenge-response…

SYSTEMS AND METHODS FOR IMPROVING TRANSIENT RESPONSE IN H-BRIDGE BUCK-BOOST DRIVERS USING INTEGRATED MATRIX MANAGER

Granted: October 26, 2023
Application Number: 20230345602
Presented are systems and methods for controlling a compensation circuit. In embodiments, a detection circuit receives a set of control signals that have been generated by a control circuit to drive a set of light emitting diode (LED) switches. The switches control a set of LEDs driven by a DC-DC converter that is coupled to a feedback loop to which the compensation circuit is removably coupled. In embodiments, the detection circuit determines whether the status of an LED is about to…

SYSTEMS AND METHODS FOR IMPROVING TRANSIENT RESPONSE IN H-BRIDGE BUCK-BOOST DRIVERS

Granted: October 26, 2023
Application Number: 20230344347
Presented are systems and methods for improving transient response in buck-boost circuits avoid circuit instabilities in both boost mode and buck mode. In embodiments, this is accomplished when, in response to determining that the circuit operates in buck mode, a compensation circuit is adjusted to operate at a first bandwidth. In response to determining that the circuit operates in boost mode, the compensation circuit may then be adjusted to decrease a boost mode crossover frequency and…

SYSTEMS AND METHODS FOR IMPROVING TRANSIENT RESPONSE IN SLEW-RATE LIMITED H-BRIDGE BUCK-BOOST DRIVERS

Granted: October 26, 2023
Application Number: 20230344340
Presented are average current mode control systems and methods for driving a load with a constant current. In embodiments, this is accomplished when, in response to a zero-current detection circuit detecting a zero current condition in the load current, a compensation circuit is disconnected from a first error amplifier to enable that error amplifier to provide a first voltage to a second error amplifier. The second error amplifier increases a charging current in a capacitor to reduce a…

ULTRA-LOW POWER INSTANT LOCK PHASE LOCK LOOP (PLL)

Granted: October 12, 2023
Application Number: 20230327676
Systems and methods reduce a locking time of a type-II all-digital phase-locked loop (ADPLL) circuit by performing steps that comprise receiving a reference signal having a reference frequency and setting a digitally controlled oscillator (DCO) to a target frequency greater than the reference frequency. The DCO generates an output signal that is used to generate a feedback signal. A time-to-digital converter is used to determine an initial phase difference between the reference signal…

POWER CONTROL SYSTEMS AND METHODS FOR MACHINE LEARNING COMPUTING RESOURCES

Granted: October 12, 2023
Application Number: 20230324980
Described are context-aware low-power systems and methods that reduce power consumption in compute circuits such as commonly available machine learning hardware accelerators that carry out a large number of arithmetic operations when performing convolution operations and related computations. Various embodiments exploit the fact that power demand for a series of computation steps and many other functions a hardware accelerator performs is highly deterministic, thus, allowing for energy…

MEASUREMENT SYSTEM WITH CONTROLLED PRESSURE RAMP

Granted: September 21, 2023
Application Number: 20230293029
A measurement system and method of manufacture can include: a pressure resistant structure; a pressure inducer coupled to the pressure resistant structure, the pressure inducer having an engaged configuration, the engaged configuration of the pressure inducer increasing pressure exerted on a portion of a user in contact with the pressure resistant structure; a light source coupled to the pressure resistant structure; an optical sensor coupled to the pressure resistant structure and…

MEASUREMENT SYSTEM WITH CONTROLLED PRESSURE RAMP

Granted: September 21, 2023
Application Number: 20230293029
A measurement system and method of manufacture can include: a pressure resistant structure; a pressure inducer coupled to the pressure resistant structure, the pressure inducer having an engaged configuration, the engaged configuration of the pressure inducer increasing pressure exerted on a portion of a user in contact with the pressure resistant structure; a light source coupled to the pressure resistant structure; an optical sensor coupled to the pressure resistant structure and…

SYSTEMS AND METHODS TO CABLE SHIELD FAULT DETECTION AND PROTECTION

Granted: August 31, 2023
Application Number: 20230275423
Described are system and method embodiments for establishing a weak ground path, comprising: disabling a first ground path for a shield pin of a cable connection interface, the first ground path including a first switch; enabling a second ground path for the shield pin, the second ground path comprises a second switch, and the second ground path having a higher resistance than the first ground path; determining a connection of a device to the cable connection interface with the second…

H-BRIDGE BUCK-BOOST FOR ADAPTIVE DRIVING BEAM HEADLAMPS

Granted: August 3, 2023
Application Number: 20230247741
Described are light emitting diode (LED) and non-LED driver systems and methods that reduce current overshoot and, deadtime, and other undesirable effects in applications such as adaptive driving beam headlamp application that negatively impact circuit parameters, including efficiency. In certain embodiments, this is accomplished by using a current clamp circuit that is controlled such as to limit an overshoot in load current, e.g., when a number of LEDs that are turned on changes.

SYSTEMS AND METHODS FOR ENERGY-EFFICIENT DATA PROCESSING

Granted: July 13, 2023
Application Number: 20230222315
An energy-efficient sequencer comprising inline multipliers and adders causes a read source that contains matching values to output an enable signal to enable a data item prior to using a multiplier to multiply the data item with a weight to obtain a product for use in a matrix-multiplication in hardware. A second enable signal causes the output to be written to the data item.

MIPI TRANSLATION IN GIGABIT MULTIMEDIA SERIAL LINK

Granted: June 29, 2023
Application Number: 20230208946
Systems and methods provide secure, end-to-end high-speed data encoding and communication. In certain embodiments, this is accomplished by modifying a header portion of a data packet received from a first device and complying with a one Mobile Industry Processor Interface (MIPI) protocol to create a modified data packet that complies with a faster MIPI protocol. The header portion of the modified data packet is validated during a tunnel mode operation using an error detection process to…

BROADBAND ON-CHIP NESTED-LOOP ALTERNATING CURRENT (AC)-COUPLING SYSTEMS AND METHODS

Granted: June 1, 2023
Application Number: 20230170852
Various embodiments of the invention provide for an AC-coupling method and systems that utilize a nested loop circuit to generate a differential mode output that facilitates an offset compensation and a common mode output that facilitates DC-biasing of an active circuit. In embodiments, the nested loop circuit comprises a differential amplifier and a differential mode loop that generates a differential mode output and a common mode loop that uses a common mode voltage and a reference…

SYSTEMS AND METHODS FOR ASYMMETRIC IMAGE SPLITTER CLOCK GENERATION

Granted: May 18, 2023
Application Number: 20230156149
Described herein are systems and methods that provide for asymmetric image splitter image stream applications. In one embodiment, a system supporting image multi-streaming comprises an asymmetric image splitter engine that splits super-frame image streams into two or more image streams and a fractional clock divider circuit. The fractional clock divider may comprise a digital feedback control loop and a one-bit sigma delta modulator. The fractional clock divider circuit may provide…

SYSTEMS AND METHODS FOR INCREASING HARDWARE ACCELERATOR PERFORMANCE IN NEURAL NETWORK APPLICATIONS

Granted: April 6, 2023
Application Number: 20230108883
Low-power systems and methods increase computational efficiency in neural network processing by allowing hardware accelerators to perform processing steps on large amounts of data at reduced execution times without significantly increasing hardware cost. In various embodiments, this is accomplished by accessing locations in a source memory coupled to a hardware accelerator and using a resource optimizer that based on storage availability and network parameters determines target locations…

DYNAMIC DATA-DEPENDENT NEURAL NETWORK PROCESSING SYSTEMS AND METHODS

Granted: March 16, 2023
Application Number: 20230077454
Dynamic data-dependent neural network processing systems and methods increase computational efficiency in neural network processing by uniquely processing data based on the data itself and/or configuration parameters for processing the data. In embodiments, this is accomplished by receiving, at a controller, input data that is to be processed by a first device in a first layer of a sequence of processing layers of a neural network using a first set of parameters. The input data is…

TRANSMITTING CLOCK REFERENCE OVER REVERSE CHANNEL IN A BIDIRECTIONAL SERIAL LINK

Granted: March 16, 2023
Application Number: 20230081578
A clock recovery circuit includes a clock detector configured to receive a serial data stream from a remote device over a reverse channel, wherein the serial data stream includes clock reference data, reverse channel data, or a combination of the clock reference data and the reverse channel data, and the clock detector configured to output a clock detect signal in response to detecting the clock reference data in the serial data stream; a phase lock loop including a first detector…