REDISTRIBUTION LAYER ENHANCEMENT TO IMPROVE RELIABILITY OF WAFER LEVEL PACKAGING
Granted: May 12, 2011
Application Number:
20110108981
An enhanced redistribution layer is provided that geometrically expands redistribution layer (RDL) pads associated with a ball grid array of a wafer level package (WLP) to provide tensile stress relief during temperature cycle and/or drop testing of the WLP.
METHOD FOR DETERMINING PRE-BIAS IN A SWITCH-MODE CONTROLLER
Granted: May 12, 2011
Application Number:
20110109294
A switch-mode controller, buck converter or DC to DC step-down regulated voltage converter that senses an initial pre-bias voltage at initialization and adjust a duty cycle of the switching frequency to help minimize an output voltage transient at initialization or power-on reset.
SYSTEM AND METHOD FOR TRANSMITTING AUDIO DATA OVER SERIAL LINK
Granted: May 5, 2011
Application Number:
20110103404
System and method for transmitting video and audio data words via a serial data link. A transmitting device includes a first module for generating an audio data frame comprising an audio data word and a frame separation code; and a second module for generating high speed data frames each comprising at least a portion of a video data word and only a portion of the audio data frame, and for transmitting the high speed data frames via the serial data link. A receiving device includes a…
SYSTEM AND METHOD OF CONTROLLING MODULATION FREQUENCY OF SPREAD-SPECTRUM SIGNAL
Granted: May 5, 2011
Application Number:
20110103427
An apparatus for generating a spread-spectrum signal based on an input signal whose frequency may vary substantially. The apparatus is particularly suited for controlling the frequency of the modulation in response to wide variations of the frequency of the input signal. This prevents the modulation frequency from deviating into an undesired frequency range which could cause adverse operational effects. The apparatus includes a detector adapted to generate a first signal related to the…
Inductors and Methods for Integrated Circuits
Granted: April 28, 2011
Application Number:
20110095395
Inductors and methods for integrated circuits that result in inductors of a size compatible with integrated circuits, allowing the fabrication of inductors, with or without additional circuitry on a first wafer and the bonding of that wafer to a second wafer without wasting of wafer area. The inductors in the first wafer are comprised of coils formed by conductors at each surface of the first wafer coupled to conductors in holes passing through the first wafer. Various embodiments are…
Integrated Camera Image Signal Processor and Video Encoder
Granted: April 21, 2011
Application Number:
20110090364
An apparatus including a first circuit and a second circuit. The first circuit may be configured to perform image signal processing using encoding related information. The second circuit may be configured to encode image data using image signal processing related information, wherein said first circuit is further configured to pass said image signal processing related information to said second circuit and said second circuit is further configured to pass said encoding related…
DB-LINEAR PROCESS-INDEPENDENT VARIABLE GAIN AMPLIFIER
Granted: April 14, 2011
Application Number:
20110084763
An amplifier is provided with continuously-variable analog control that exhibits a highly linear gain control curve in db/volts, while preserving high dynamic range, low third order distortion, and low noise. This amplifier has a control mechanism that preserves a varied linear or log linear curve over a wide range and is inherently insensitive to process variations thereby allowing more accurate gain control and higher signal fidelity for amplifying high dynamic range signals.
I2C/SMBus Ladders and Ladder Enabled ICs
Granted: April 7, 2011
Application Number:
20110082955
I2C/SMBus ladders and ladder enabled ICs (devices) to enable daisy-chained I2C/SMBus communication. The devices are particularly useful in monitoring and/or servicing high-voltage battery stacks and other voltage stacks. The devices are powered from a respective voltage increment in the voltage stack, and include level shifting circuitry so as to be operative with an input voltage up to the breakdown voltage of the level shifting circuitry. Various features are disclosed, including but…
SYSTEM FOR AND METHOD OF VIRTUAL SIMULTANEOUS SAMPLING WITH A SINGLE ADC CORE
Granted: March 3, 2011
Application Number:
20110050278
Voltage balancing in multi-cell battery packs is improved by estimating instantaneous voltages on the cells. In accordance with one embodiment, an apparatus for reading voltages from multiple voltage sources includes a first multiplexer coupled to multiple voltage sources and a controller. The controller is programmed to output from the first multiplexer a sequential pair of voltages read from each of the multiple voltage sources. The multiple sequential pairs of voltages all have a…
SYSTEM AND METHOD FOR TRANSFERRING DATA OVER FULL-DUPLEX DIFFERENTIAL SERIAL LINK
Granted: February 24, 2011
Application Number:
20110044217
A data transmission technique where high speed data is transmitted differentially in a forward channel by way of a serial link, and relatively low speed data is differentially modulated onto the forward channel signal for transmission in a reverse channel via the link. By utilizing differential modulation in both forward and reverse channels, the resulting signal has a common mode voltage that is substantially constant, resulting in low EMI. The spectral content of the signal associated…
METHOD OF FORMING SOLDERABLE SIDE-SURFACE TERMINALS OF QUAD NO-LEAD FRAME (QFN) INTEGRATED CIRCUIT PACKAGES
Granted: February 10, 2011
Application Number:
20110033977
A method of forming an integrated circuit (IC) package is disclosed comprising: (a) removing oxides from side surfaces of terminals of the IC package; (b) substantially covering an underside of the terminals of the IC package; and (c) forming a solder coating on the side surfaces of terminals of the IC packages while covering the underside of the terminals of the IC package. The solder coating on the side surfaces of the terminals protects the terminals from oxidation due to aging and…
SYSTEM AND METHOD FOR COMPENSATING PULSE GENERATOR FOR PROCESS AND TEMPERATURE VARIATIONS
Granted: February 3, 2011
Application Number:
20110025395
An apparatus for generating a pulse having a pulse width substantially independent of process variation in resistive and capacitive values. The apparatus includes a PTAT current source to generate a first current to charge a capacitor to produce a first voltage; a ?VGS current source to generate a second current through a resistor to produce a second voltage V2; a comparator to generate the pulse in response to the first and second voltages; and a circuit to enable the charging and…
METHOD AND APPARATUS FOR SENSING CAPACITANCE VALUE AND CONVERTING IT INTO DIGITAL FORMAT
Granted: January 20, 2011
Application Number:
20110012618
A capacitive sensing system are configured to sense a capacitance value and convert the sensed capacitance value to a digital format. The capacitive sensing system provides good selectivity and immunity to noise and interference, which can be further enhanced by enabling spread spectrum excitation. In some embodiments, the capacitive sensing system utilizes a sinusoidal excitation signal that results in low electromagnetic emissions, limited to narrow frequency band. In some embodiments,…
CIRCUIT TOPOLOGY FOR DRIVING HIGH-VOLTAGE LED SERIES CONNECTED STRINGS
Granted: December 16, 2010
Application Number:
20100315572
A system for backlighting a display uses an open or closed loop and small components that are well suited to high-frequency applications. The system includes multiple LED strings, a high-voltage source, and a low-voltage regulator that has a polarity opposite to that of the high-voltage source. The high-voltage source and the low-voltage regulator provide voltage differences across the LED strings to illuminate them. In one embodiment, the high-voltage source is about 200 VDC, and the…
EFFICIENT POWER REGULATION FOR CLASS-E AMPLIFIERS
Granted: October 7, 2010
Application Number:
20100253310
A power converter device and method are provided. The power converter device includes an input power source and an input inductor configured for coupling a power of the input power source to the device. A switch is configured to regulate a power of the input power source through the input inductor. A shunting diode is coupled between the switch and the input inductor. A resonant load is coupled with the input inductor. A switching element is coupled with the input inductor and the…
CRITICAL CONDUCTION RESONANT TRANSITION BOOST POWER CIRCUIT
Granted: September 9, 2010
Application Number:
20100225290
A boost regulator is provided that has increased efficiency. The increased efficiency is provided by incorporating a sensing circuit that senses when the current in the boost regulator's inductor is near zero or when the voltage at its switching node is near zero or virtual ground. A switching signal is provided to the boost regulator's switching transistor when the near zero current or voltage is sensed. Switching at the near zero current or voltage moment (the “critical conduction…
FAULT DETECTION METHOD FOR DETECTING LEAKAGE PATHS BETWEEN POWER SOURCES AND CHASSIS
Granted: August 19, 2010
Application Number:
20100207635
A method of detecting a ground fault condition between a direct current power system and the chassis ground of an electric or hybrid-electric vehicle is provided. The method includes sequentially opening and closing a first switch connected between a positive node of the direct current power system and the chassis ground of the vehicle and a second switch connected between a negative node of direct current power system and the chassis ground. The sequential opening and closing of the…
Minimum Cost Method for Forming High Density Passive Capacitors for Replacement of Discrete Board Capacitors Using a Minimum Cost 3D Wafer-to-Wafer Modular Integration Scheme
Granted: July 15, 2010
Application Number:
20100178747
Passive, high density, 3d IC capacitor stacks and methods that provide the integration of capacitors and integrated circuits in a wafer to wafer bonding process that provides for the integration of capacitors formed on one wafer, alone or with active devices, with one or more integrated circuits on one or more additional wafers that may be stacked in accordance with the process. Wafer to wafer bonding is preferably by thermo-compression, with grinding and chemical mechanical polishing…
SYSTEM AND METHOD FOR INTERFACING APPLICATIONS PROCESSOR TO TOUCHSCREEN DISPLAY FOR REDUCED DATA TRANSFER
Granted: June 17, 2010
Application Number:
20100149121
System and method for substantially reducing an involvement of an applications processor in receiving data from a touchscreen display. In one aspect, the system includes a controller may be configured in an autonomous mode where it automatically measures the touchscreen display based configuration information received from the applications processor, determines notable events based on the measurement data, stores data and event identifiers related to the notable events in a memory, and…
Bragg Mirror and Method for Making Same
Granted: May 20, 2010
Application Number:
20100123948
In an embodiment, set forth by way of example and not limitation, a Bragg mirror includes a first bi-layer of a first thickness and a second bi-layer of a second thickness which is different from the first thickness. In this exemplary embodiment, the first bi-layer consists essentially of a first high impedance layer and a first low impedance layer, and the second bi-layer of a second thickness which is different from the first thickness, the second bi-layer consisting essentially of a…
