Cable connection detection for electronic devices
Granted: May 13, 2014
Patent Number:
8725910
A cable detection circuit for a device, set forth by way of example and not limitation, includes a generator circuit operative to provide currents on a line of a communication interface. A controller is coupled to the generator circuit and operative to detect an amount of capacitance on the line based on the provided currents. The controller is operative provide an output based on the detected amount of capacitance, the output indicating whether a cable is connected to the device via the…
Multi-step ADC with sub-ADC calibration
Granted: May 13, 2014
Patent Number:
8723706
Various embodiments of the invention allow for error calibration in analog-to-digital converters (ADCs) having multiple cascaded ADC stages. The ADC stages exchange information that is utilized in the calibration process. Various embodiments allow for calibration of one stage by utilizing a feedback signal from at least one subsequent stage. Certain embodiments of the invention increase the speed of the calibration process by utilizing coarse and fine sub-ADCs.
Precision sub-RADIXDAC with linearity calibration
Granted: May 6, 2014
Patent Number:
8717214
An N bit sub-binary radix digital-to analog converter (DAC) includes a radix conversion module that converts an m bit digital input signal to an N bit sub-radix DAC code. A ladder module having NL bits has a plurality of first circuit elements corresponding to first respective bits of the N bit sub-radix DAC code. A segment module having NS bits has at least one second circuit element corresponding to second respective bits of the N bit sub-radix DAC code. N>m, and N is the sum of NL…
Integrated MOSFET current sensing for fuel-gauging
Granted: May 6, 2014
Patent Number:
8717033
Integrated MOSFET current sensing for fuel-gauging. A 1st MOSFET through which the current is to be sensed is coupled to a 2nd MOSFET of the same type, the 2nd MOSFET being biased to have the same resistance as the 1st MOSFET. The 2nd MOSFET has a much smaller area than the 1st MOSFET, and is coupled to a current source representing a maximum current through the 1st MOSFET. The voltage across the 1st MOSFET relative to the voltage across the 2nd MOSFET provides a measure of the current…
LDMOS with corrugated drift region
Granted: May 6, 2014
Patent Number:
8716791
Semiconductor devices, such as LDMOS devices, are described that include a plurality of trench regions formed in an extended drain region of the devices. In one or more implementations, the semiconductor devices include a substrate having an extended drain region, a source region, and a drain region, all of the first conductivity type, formed proximate to a surface of the substrate. A gate is positioned over the surface and between the source region and the drain region. The gate is…
Optical gesture sensor using a single illumination source
Granted: May 6, 2014
Patent Number:
8716649
A gesture sensing device includes a single light source and a multiple segmented single photo sensor, or an array of photo sensors, collectively referred to herein as segmented photo sensors. A light modifying structure relays reflected light from the light source onto different segments of the segmented photo sensors. The light modifying structure can be an optical lens structure or a mechanical structure. The different segments of the photo sensor sense reflected light and output…
Front end for RF transmitting-receiving systems with implicit directional control and time-multiplexing method in submicron technology
Granted: April 29, 2014
Patent Number:
8711831
A new design configuration of an RF-transceiver front end is proposed. The Power Amplifier (PA) output stage of the transceiver comprises a cascode circuitry of N-type transistors with open-drain-configuration. The cascode-transistor is acting as a common-gate-transistor, whose gate is controlled to block the transmitting-(TX) path. The Low Noise Amplifier (LNA) input stage uses a common-gate configuration of a p-channel MOS-transistor that is controlled by the voltage at the bulk…
Method of forming solderable side-surface terminals of quad no-lead frame (QFN) integrated circuit packages
Granted: April 29, 2014
Patent Number:
8709870
A method of forming an integrated circuit (IC) package is disclosed comprising: (a) removing oxides from side surfaces of terminals of the IC package; (b) substantially covering an underside of the terminals of the IC package; and (c) forming a solder coating on the side surfaces of terminals of the IC packages while covering the underside of the terminals of the IC package. The solder coating on the side surfaces of the terminals protects the terminals from oxidation due to aging and…
Circuit topology for pulsed power energy harvesting
Granted: April 22, 2014
Patent Number:
8704494
An energy harvesting circuit harvests energy from a voltage source and charges a storage element with the harvested energy. The energy harvesting circuit includes an energy source, a storage capacitor to store energy output from the energy source, a power converter circuit, an energy storage element, and an enabling circuit. The enabling circuit turns the boost converter circuit on and off according to a monitored capacitance voltage of the storage capacitor. When the boost converter…
Non-disruptive adapter equalizer coefficient update method for active links
Granted: April 22, 2014
Patent Number:
8705607
Various embodiments of the innovation provide adaptive equalization training for a receiver in a communication system. In certain embodiments, the receiver's coefficients are re-optimized while links are active and initialized.
LED current control in a dimmable LED illumination system
Granted: April 22, 2014
Patent Number:
8704460
The invention relates to a light emitting diode (“LED”) illumination system, and more particularly, to systems, devices and methods of driving a LED module by a current generator that is powered and controlled by a regulated dc voltage associated with a brightness level. Such a dimmable LED illumination system is compatible with both a high-voltage ac signal coupled from any wall outlet and a low-voltage ac signal provided by an electronic transformer. A diode bridge rectifies the ac…
Adaptive equalizer
Granted: April 15, 2014
Patent Number:
8699555
An adaptive equalizer circuit, set forth by way of example and not limitation, includes a plurality of paths receiving an input signal. One or more equalizers are each provided on one of the paths and are operative to equalize signal amplitude. An equalizer selector receives the input signal and is operative to output a selection signal based on higher-frequency content and lower-frequency content of the input signal. The selection signal is operative to select one of the paths to output…
System integration of tactile feedback and touchscreen controller for near-zero latency haptics playout
Granted: April 15, 2014
Patent Number:
8698766
A haptic feedback system includes a user interface device, such as a touchscreen that includes a touch panel and one or more haptic drive elements coupled to the touch panel, a touch controller, and an actuator controller. The touch controller receives sensed data from the touch panel, and in response generates and sends a haptic signal to an actuator controller. Generation and transmission of the haptic signal bypasses any system host controller. A dedicated signal path couples the…
Active parasite power circuit
Granted: April 15, 2014
Patent Number:
8698358
A circuit is provided that includes a parasitic power circuit that powers a parasitic circuit. The parasitic power circuit derives a supply voltage from an external AC or other signal suitable for use as a communications signal. A PMOS transistor or transistors is utilized to enable a supply voltage capacitor to charge substantially to the same voltage as the channel voltage of the communications signal.
Wafer-level packaged device having self-assembled resilient leads
Granted: April 8, 2014
Patent Number:
8692367
A wafer-level packaged semiconductor device is described. In an implementation, the device includes one or more self-assembled resilient leads disposed on an integrated circuit chip. Each of the resilient leads are configured to move from a first position wherein the resilient lead is held adjacent to the chip and a second position wherein the resilient lead is extended away from the chip to interconnect the chip to a printed circuit board. A guard is provided to protect the resilient…
Low distortion MOS attenuator
Granted: April 1, 2014
Patent Number:
8686780
An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be…
Efficiency regulation for LED illumination
Granted: April 1, 2014
Patent Number:
8686654
Various embodiments of the present invention relate to a switch-mode regulator, and more particularly, to systems, devices and methods of using a switch-mode regulator to regulate an LED current to improve overall LED system efficacy and suppress power consumption of a dimmable LED illumination system. Both high and moderate brightness modes are implemented in an LED driver based on the switch-mode regulator. In the high brightness mode, the LED current is larger than a preferred LED…
Wafer-level chip-scale package device having bump assemblies configured to mitigate failures due to stress
Granted: April 1, 2014
Patent Number:
8686560
Wafer-level chip-scale package semiconductor devices are described that have bump assemblies configured to mitigate solder bump failures due to stresses, particularly stresses caused by CTE mismatch during thermal cycling tests, dynamic deformation during drop tests or cyclic bending tests, and so on. In an implementation, the wafer-level chip-scale package devices include an integrated circuit chip having two or more arrays of bump assemblies for mounting the device to a printed circuit…
3D chip package with shielded structures
Granted: April 1, 2014
Patent Number:
8686543
A 3D chip package is disclosed that includes a carrier substrate with a first cavity and a second cavity formed therein. A first structure is attached to the carrier substrate at least partially in the first cavity, and a second structure is attached to the carrier substrate at least partially in the second cavity, where the first and second structures include electrical circuitry. A shield layer may be disposed between the carrier substrate and the first structure and/or the second…
Dimmable offline LED driver
Granted: March 25, 2014
Patent Number:
8680784
Embodiments of the present invention provide a system and method for controlling the amplitude of a current from a diode bridge into an EMI filter and LED array. Due to the manner in which certain dimmers (i.e., leading edge dimmers) operate, there is a delay on its output in transmitting a voltage when the voltage crosses zero.
