Integrated circuit packages incorporating an inductor and methods
Granted: June 28, 2011
Patent Number:
7969002
Integrated circuit packages incorporating an inductor and methods for their fabrication. The lead frame used in packaging the integrated circuit includes a first area for receiving the integrated circuit, and a second area having a plurality of connections from one side to the other side of the lead frame, thereby forming coil segments. After mounting the integrated circuit and wire bonding its connections, the lead frame is placed on a ferrite plate, the assembly is encapsulated in…
Orientation-dependent etching of deposited AlN for structural use and sacrificial layers in MEMS
Granted: June 14, 2011
Patent Number:
7960200
In accordance with the present invention, accurate and easily controlled sloped walls may be formed using AlN and preferably a heated TMAH for such purpose as the fabrication of MEMS devices, wafer level packaging and fabrication of fluidic devices. Various embodiments are disclosed.
Iteration based method and/or apparatus for offline high quality encoding of multimedia content
Granted: May 31, 2011
Patent Number:
7953147
A method for encoding video, comprising the steps of (A) encoding a number of frames of a video signal using a first sub-set of encoding parameters, (B) analyzing the encoded frames to find and mark reference frames that are used more than a predetermined number of times, and (C) re-encoding the video signal using a second sub-set of encoding parameters different than the first sub-set of encoding parameters when re-encoding the marked reference frames.
Secure transaction microcontroller with tamper control circuitry
Granted: May 31, 2011
Patent Number:
7953989
A high security microcontroller (such as in a point of sale terminal) includes tamper control circuitry for detecting vulnerability conditions: a write to program memory before the sensitive financial information has been erased, a tamper detect condition, the enabling of a debugger, a power-up condition, an illegal temperature condition, an illegal supply voltage condition, an oscillator fail condition, and a battery removal condition. If the tamper control circuitry detects a…
Minimum cost method for forming high density passive capacitors for replacement of discrete board capacitors using a minimum cost 3D wafer-to-wafer modular integration scheme
Granted: May 17, 2011
Patent Number:
7943473
Passive, high density, 3d IC capacitor stacks and methods that provide the integration of capacitors and integrated circuits in a wafer to wafer bonding process that provides for the integration of capacitors formed on one wafer, alone or with active devices, with one or more integrated circuits on one or more additional wafers that may be stacked in accordance with the process. Wafer to wafer bonding is preferably by thermo-compression, with grinding and chemical mechanical polishing…
Multi-programmable non-volatile memory cell
Granted: May 17, 2011
Patent Number:
7944750
A non-volatile memory device and method for manufacture and programing which does not require a control gate for the programing or erasure of the device. The memory device is comprised of two wells with the opposite conductivity type of the semiconductor body. In one of the wells is a source and drain well of the same conductivity type as of the body. A oxide is formed on the surface of the body on which a floating gate is formed. Specific voltages are applied to the source, drain, first…
Active rectifier with load impedance switching
Granted: May 3, 2011
Patent Number:
7936830
Active rectification with load impedance switching for communication across a pulse transformer is presented. Load impedance switching is used for communicating data from the secondary side of the transformer to the primary side during data frames. During power frames, the load impedance is switched to a capacitor for the storage of charge from received power pulses, which may then be converted into a power source. The active rectifier circuit is configurable to accommodate different…
Package-on-package secure module having anti-tamper mesh in the substrate of the upper package
Granted: April 12, 2011
Patent Number:
7923830
A package-on-package (POP) secure module includes a first ball grid array (BGA) package and a second BGA package. The first BGA includes an array of bond balls that is disposed on a side of a substrate member, and an array of lands that is disposed on the opposite side of the substrate member. Bond balls of the second BGA are fixed to the lands of the first BGA such that the second BGA is piggy-back mounted to the first BGA. Embedded in the substrate member of the second BGA is an…
Vertical MOSFET with through-body via for gate
Granted: March 22, 2011
Patent Number:
7910992
In an embodiment, set forth by way of example and not limitation, a MOSFET power chip includes a first vertical MOSFET and a second vertical MOSFET. The first vertical MOSFET includes a semiconductor body having a first surface defining a source and a second surface defining a drain and a gate structure formed in the semiconductor body near the second surface. A via is formed within the semiconductor body and is substantially perpendicular to the first surface and the second surface. The…
Methods and apparatus to improve efficiency in cold cathode fluorescent light controllers
Granted: March 8, 2011
Patent Number:
7903105
Methods and apparatus to improve efficiency in cold cathode fluorescent light (CCFL) controllers using a full bridge resonant implementation. The secondary of a transformer drives the CCFL, with the primary of the transformer being driven through a capacitor from a full bridge. The bridge alternately and repetitively connects the capacitor and primary between power supply connections, across one of the power supply connections, between the power supply connections with an alternate…
Compact integrated circuit solutions for driving liquid lenses in autofocus applications
Granted: March 1, 2011
Patent Number:
7898302
Compact integrated circuit solutions for driving liquid lenses in autofocus applications. The invention uses a charge pump topology to produce high voltage, and needs only a low voltage external capacitor. No high voltage capacitor or inductor or transformer is used to provide the required high voltage or for smoothing the same.
System and method of controlling the soft start control voltage of switching regulator in response to output current sensing
Granted: March 1, 2011
Patent Number:
7898830
An apparatus, such as a Buck converter system, for generating an output voltage while at the same time monitoring whether an overload or over current condition occurs at the output, and protecting the system if the overload or over current condition occurs. The apparatus includes a first circuit adapted to monotonically change a control voltage from a first voltage (e.g., approximately ground potential) towards a second voltage (e.g., a reference voltage VREF); a second circuit adapted…
dB-linear process-independent variable gain amplifier
Granted: February 15, 2011
Patent Number:
7889006
An amplifier is provided with continuously-variable analog control that exhibits a highly linear gain control curve in db/volts, while preserving high dynamic range, low third order distortion, and low noise. This amplifier has a control mechanism that preserves a varied linear or log linear curve over a wide range and is inherently insensitive to process variations thereby allowing more accurate gain control and higher signal fidelity for amplifying high dynamic range signals.
Package on-package secure module having BGA mesh cap
Granted: January 11, 2011
Patent Number:
7868441
A package-on-package (POP) secure module includes a BGA mesh cap, a first BGA package, and a second BGA package. The first BGA package includes a first integrated circuit (for example, a microcontroller that includes tamper detect logic). The second BGA package includes a second integrated circuit (for example, a memory). The second BGA package is piggy-back mounted to the first BGA package and the BGA mesh cap is piggy-back mounted to the second BGA package. A printed circuit board…
EEPROM memory device and method of programming memory cell having N erase pocket and program and access transistors
Granted: January 11, 2011
Patent Number:
7869279
A memory device including a plurality of memory cells, each with access and program PMOS transistors situated in a common N-Well formed in a P-substrate, and an n-erase pocket formed directly in the P-substrate. Each cell includes a program PMOS including gate, and first and second P+ regions formed in an N-Well, wherein the first P+ region is electrically connected to a corresponding bit line. Each cell further comprises an access PMOS including a gate, and first and second P+ regions…
Sampling device and circuit having a single voltage supply
Granted: January 4, 2011
Patent Number:
7863943
In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various embodiments of the invention obviate the requirement of an external negative supply voltage or attenuation resistors to allow sampling between a positive and negative voltage range. These embodiments result in a lower power…
Integrated camera image signal processor and video encoder
Granted: December 28, 2010
Patent Number:
7859574
An apparatus including a first circuit and a second circuit. The first circuit may be configured to perform image signal processing using encoding related information. The second circuit may be configured to encode image data using image signal processing related information, wherein said first circuit is further configured to pass said image signal processing related information to said second circuit and said second circuit is further configured to pass said encoding related…
Mixer topologies having improved second order intermodulation suppression
Granted: December 21, 2010
Patent Number:
7856221
Mixer topologies that have sufficiently high IIP2 and sufficiently low quadrature error to make zero IF receivers possible without special calibration techniques. This simplifies the receiver, avoids circuit startup delay and provides more stable performance over time and temperature. The methodology to achieve this performance in preferred embodiments consists of as many as three elements: (a) a high power local oscillator buffer circuit capable of driving low impedance loads coupled to…
IC package structures for high power dissipation and low RDSon
Granted: December 14, 2010
Patent Number:
7851897
IC package structures for high power dissipation and low RDSon. The package can be considered an inverted QFN package typically manufactured from a double etched lead frame that is then formed (stamped) to receive the electronic devices for connection and wire bonding to the lead frame leads, followed by potting and dicing. Using a split paddle allows the packaging of multiple, electrically isolated power devices. The package is particularly advantageous for packaging vertical power…
Program memory space expansion for particular processor instructions
Granted: December 14, 2010
Patent Number:
7853773
A system efficiently expands program memory without extensively modifying the remaining microcontroller architecture. An address bus of N+M bits addresses 2N memory locations in a regular portion of program memory and additional memory locations in an expanded portion. An N-bit program counter increments through instructions stored only in the regular portion. Constants are stored in both the regular and expanded portions. An M-bit page-designator is prepended to an N-bit operand to…
