Timer Circuit With Adaptive Reference
Granted: November 2, 2006
Application Number:
20060244545
A timer circuit includes a current mirror, a capacitor, a first switch, a resistor and a comparator. The current mirror receives a reference current and provides first and second currents with a predefined current ratio. The capacitor receives the first current as a sinking current or as a sourcing current. The first switch, controlled by a control signal, allows the capacitor to be charged by the first current or be discharged. The resistor is biased by the second current to provide an…
Lateral Programmable Polysilicon Structure Incorporating Polysilicon Blocking Diode
Granted: September 21, 2006
Application Number:
20060208287
A programmable element includes a diode and a programmable structure formed in a polysilicon layer isolated from a semiconductor substrate by a dielectric layer. The diode includes a first region and a second region of opposite conductivity types. The programmable structure includes a third region and a fourth region of opposite conductivity types. The first region of the diode and the third region of the programmable structure are electrically connected. In operation, the programmable…
Surge delay for current limiter
Granted: February 16, 2006
Application Number:
20060034030
A surge current delay time period is added to a current limit delay time period in order to permit a longer time for a possibly temporary larger-than-steady-state electrical current, such as for a start-up power requirement. A system is described for permitting a legitimate surge current by distinguishing true over-current fault conditions from temporary surges in terms of high current duration time.
Seal ring for mixed circuitry semiconductor devices
Granted: January 19, 2006
Application Number:
20060012003
In mixed-component, mixed-signal, semiconductor devices, selective seal ring isolation from the substrate and its electrical potential is provided in order to segregate noise sensitive circuitry from electrical noise generated by electrically noisy circuitry. Appropriate predetermined sections of such a mixed use chip are isolated from the substrate through a non-ohmic contact with the substrate without compromising reliability of the chip's isolation from scribe region contamination.
Current sense resistor circuit with average kelvin sense features
Granted: December 22, 2005
Application Number:
20050283325
A current sense resistor circuit using Kelvin connection sense features provides an average voltage across net sense resistance and average voltage across net reference resistance to be available at the Kelvin connection points. The Kelvin connections can be used by a negative feedback gain loop to hold the average current through respective reference elements and sense elements substantially constant.
ESD protection for integrated circuits
Granted: December 15, 2005
Application Number:
20050275027
Electrostatic discharge protection for integrated circuits, particularly for enhancing electrostatic discharge protection performance for Input-output cells and power supply clamps used in CMOS and BiCMOS IC technologies is described. A P-type, implantation region, or layer, referred to as “P-deep,” in both N-MOSFET and P-MOSFET devices is provided to enhance electrostatic discharge protection performance. Parasitic transistor gain is enhanced by providing the P-deep region subposing…
ELIMINATION OF RECIRCULATION CURRENT LOSS IN LOAD-SHARED SWITCHING MODE POWER SUPPLIES
Granted: December 15, 2005
Application Number:
20050275290
In master-slave current-tracking load-share systems using switching power supplies, a method and apparatus for preventing current recirculation at light-load and no-load operational conditions. The slave power supply is run in a discontinuous mode when load current falls to light-load or no-load state, preventing the slave from sinking current, therefore preventing recirculation from the master to the slave. The slave power supply is run at a lower current level than the master,…
Current-limiting circuitry
Granted: December 15, 2005
Application Number:
20050275394
A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the…
Light emitting diode driver circuit
Granted: November 3, 2005
Application Number:
20050243041
Describe is a device for a multiplexing, output current-sensed, boost converter circuit which may be used as an LED driver. A boost converter LED driver circuit using a single set of passive external LC components for controlling the current through, and thus the output of, one and more than one bank of LEDs. The present invention allows for regulated current in one and more than one bank of LEDs by sensing current in the controller. The output voltage of a switcher adjusts it's level…
Common-mode feedback circuit
Granted: September 22, 2005
Application Number:
20050206453
A common-mode feedback circuit is provided for fully-differential operational amplifier stages of a multistage amplifier. A first stage of the circuit establishes a substantially constant current output level for a feedback generating stage of the circuit. An exemplary embodiment using MOSFET devices illustrates using a diode-connected MOSFET and mirror MOSFET first stage and a generating the current for a common-source connected MOSFET second stage connected to the respective outputs…
HIGH FREQUENCY DIFFERENTIAL POWER AMPLIFIER
Granted: September 22, 2005
Application Number:
20050206412
A differential CMOS amplifier includes two CMOS inverters and biasing circuitry providing feedback loops across the output and input of each inverter. The biasing circuitry provides linear biasing so that the inverters can apply a desired gain to a pair of high frequency input signals (i.e., a differential input signal). The biasing circuitry can include operational amplifiers (op-amps) for providing positive feedback control between the output and input of the inverters. The inputs of…
Method for optimizing the accuracy of an electronic circuit
Granted: September 1, 2005
Application Number:
20050189954
The present invention provides an apparatus and method for improving the accuracy of circuits. The apparatus includes a replicate circuit and a trim determination circuit. The trim determination circuit includes a measurable circuit element and determines the state of the measurable element. The replicate circuit includes a replicate circuit element which has similar electrical characteristics as the measurable element, and is configured to aid in determining an adjustable test current.…
Insulated gate bipolar transistor and electrostatic discharge cell protection utilizing insulated gate bipolar tansistors
Granted: August 4, 2005
Application Number:
20050167753
IGBTs and circuits can be designed to improve the ability of circuits and systems to withstand ESD events. In addition pads can be designed to take advantage of the circuits and IGBTs to withstand and dissipate ESD events.
AUXILIARY OUTPUT DRIVER
Granted: July 28, 2005
Application Number:
20050162196
A BiCMOS auxiliary output driver is provided to maintain output logic signal levels when integrated circuit chip power supply voltage is outside its nominal range. When the power supply voltage level is within design tolerance for a MOSFET output driver stage, the auxiliary output driver is off; when below design tolerance, the auxiliary output driver is turned on. Driver stage output pad signal level is maintained at a desired state level by the auxiliary output driver whenever the…
Thick gate oxide transistor and electrostatic discharge protection utilizing thick gate oxide transistors
Granted: June 30, 2005
Application Number:
20050139958
An electrostatic discharge (ESD) protection circuit that includes an transistor with a gate electrode isolated from the semiconductor substrate. The transistor can be an insulated gate bipolar transistor (IGBT) connected between an integrated circuit (IC) pad and ground. The IGBT includes a parasitic thyristor that latches when the voltage at the pad exceeds a threshold level and does not turn off until the charge at the pad is dissipated, thereby preventing electrostatic damage to the…
Semiconductor devices integrated with wafer-level packaging
Granted: March 3, 2005
Application Number:
20050046022
Active circuit elements for semiconductor devices are integrated with chip-scale bump-out beams. In some embodiments, regions of the beam itself are employed as part of an active element. The bump-out beam is employed to construct selected components of the active circuit elements such as a resistor, an inductor, a capacitor, or an antenna for the semiconductor device.
Integrating chip scale packaging metallization into integrated circuit die structures
Granted: December 9, 2004
Application Number:
20040245631
Wafer-level chip-scale packaging technology is used for improving performance or reducing size of integrated circuits by using metallization of pad-to-bump-out beams as part of the integrated circuit structure. Chip-scale packaging under bump metal is routed to increase the thickness of top metal of the integrated circuit, increasing current carrying capability and reducing resistance. An exemplary embodiment for a power MOSFET array integrated structure is described.
Ballast resistors for transistor devices
Granted: October 7, 2004
Application Number:
20040195644
A transistor is formed with a source ballast resistor that regulates channel current. In an LDMOS transistor embodiment, the source ballast resistance may be formed using a high sheet resistance diffusion self aligned to the polysilicon gate, and/or by extending a depletion implant from under the polysilicon gate toward the source region. The teachings herein may be used to form effective ballast resistors for source and/or drain regions, and may be used in many types of transistors,…
Thick gate oxide transistor and electrostatic discharge protection utilizing thick gate oxide transistors
Granted: July 8, 2004
Application Number:
20040129983
An electrostatic discharge (ESD) protection circuit that includes an transistor with a gate electrode isolated from the semiconductor substrate. The transistor can be an insulated gate bipolar transistor (IGBT) connected between an integrated circuit (IC) pad and ground. The IGBT includes a parasitic thyristor that latches when the voltage at the pad exceeds a threshold level and does not turn off until the charge at the pad is dissipated, thereby preventing electrostatic damage to the…
Bias signal generator in radio receiver
Granted: March 25, 2004
Application Number:
20040058663
A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in…
