Spread Spectrum ASK/OOK Transmitter
Granted: November 1, 2007
Application Number:
20070253468
An ASK/OOK transmitter includes a frequency-shift keying (FSK) modulator receiving an input bit sequence and generating a FSK modulation signal indicative of the input bit sequence, a frequency generation circuit receiving the FSK modulation signal and generating a carrier signal having a first frequency where the frequency of the carrier signal is shifted by the FSK modulation signal to form a wideband carrier signal, an amplitude-shift keying (ASK) modulator receiving input data and…
Test Mode For Pin-Limited Devices
Granted: November 1, 2007
Application Number:
20070255984
A pin-limited device includes a pattern-recognition circuit that detects a predetermined signal pattern transmitted on a supply pin of the device. The predetermined signal pattern is generated within the acceptable operating voltage range of the IC device (e.g., between the minimum and maximum acceptable system voltage levels utilized to control the internal circuitry of the device). Accordingly, the pin-limited IC device continues to operate within specifications while the predetermined…
RIGHT HALF-PLANE ZERO COMPENSATION AND CANCELLATION FOR SWITCHING REGULATORS
Granted: November 1, 2007
Application Number:
20070252570
An improved method of canceling a RHPZ of a switching regulator can include detecting a predetermined error signal provided to a pulse width modulation (PWM) circuit, wherein the predetermined error signal is associated with the RHPZ. Once a RHPZ is detected, a ramp waveform provided to the PWM circuit can be temporarily lengthened, thereby canceling the RHPZ. Notably, temporarily lengthening the ramp waveform can be based on adjusting an RZ*CZ time constant. In one embodiment, the ramp…
Creating Additional Phase Margin In The Open Loop Gain Of A Negative Feedback Amplifier System Using A Boost Zero Compensating Resistor
Granted: October 18, 2007
Application Number:
20070241731
A low-dropout voltage (LDO) regulator that creates a zero in the open loop gain using a relatively small-sized current control element to divert part of the supplied load current through a “zero” resistor before adding it to the output load. The main part of the output load is passed through a relatively large second current control element. A control signal generated by an error amplifier (e.g., an op-amp) is used to control the small current control element, but is passed through a…
Single Poly BiCMOS Flash Cell With Floating Body
Granted: October 11, 2007
Application Number:
20070235816
A BiCMOS integrated circuit (IC) includes a floating gate-type non-volatile memory (NVM) device that uses the polycrystalline silicon gate of a CMOS FET and the P-base and N-emitter diffusions of a bipolar transistor to provide an isolated P-type body and N-type source/drain diffusions. The P-body diffusion of the NVM device is isolated from a P-substrate by an N-well, thus facilitating the use of reduced positive and negative voltage levels to produce the onset of Fowler-Nordheim…
Circuit and method for quickly turning off MOS device
Granted: September 20, 2007
Application Number:
20070216384
An OTA driving an MOS device needs to turn it off quickly to minimize overshoot during a heavy to light load state. The drains of the MOS device can be used to accelerate turning off the MOS device. A first drain is connected to the gate of the MOS device. A second drain is connected to a base of a bipolar device. The emitter of the bipolar device is connected to the MOS device gate. Notably, this bipolar device is active during the heavy to light load state. Therefore, any current…
Amplifier turn-on speedup technique
Granted: September 20, 2007
Application Number:
20070216479
A method of reducing the settling time of an amplifier includes providing a pre-set voltage on a high gain node of the amplifier when the amplifier is disabled. This pre-set voltage can be slightly less than the regulated voltage. In this manner, when the amplifier is enabled, the high gain node can quickly reach this regulated voltage. The pre-set voltage can be applied to the high gain node by operating a switch, e.g. if the amplifier is enabled (disabled), then the switch is open…
Schottky Diode Device with Aluminum Pickup of Backside Cathode
Granted: June 21, 2007
Application Number:
20070138648
An integrated circuit package includes a semiconductor chip having a passivation layer forming the top surface of the semiconductor chip and a metal pad formed on the passivation layer and a discrete electronic device having a first terminal formed on a first surface and a second terminal formed on a second surface opposite the first surface of the discrete electronic device where the first surface of the discrete electronic device is attached to the metal pad using a conductive adhesive…
PULSE FREQUENCY MODULATED VOLTAGE REGULATOR WITH LINEAR REGULATOR CONTROL
Granted: June 21, 2007
Application Number:
20070139025
A PFM-type voltage regulator circuit converts an unregulated input voltage into a regulated output voltage using a first transistor controlled by a pulse control circuit and a second transistor controlled by a linear regulator circuit. The linear regulator circuit controls the second transistor when the regulated output voltage falls to a predetermined minimum target voltage level, thereby maintaining the regulated output voltage at the minimum target voltage level. The pulse control…
Input/Output Circuit for Handling Unconnected I/O Pads
Granted: June 21, 2007
Application Number:
20070139076
A circuit coupled to an input-output bond pad (I/O pad) in an integrated circuit including an input buffer, an output buffer and a pad management circuit. The pad management circuit receives a first data signal, a first output enable signal, and a configuration signal indicative of the connection state of the I/O pad, and generates a second data signal and a second output enable signal. When the configuration signal indicates the I/O pad is to be connected to a package pin, the pad…
SINGLE-PIN TRACKING/SOFT-START FUNCTION WITH TIMER CONTROL
Granted: May 31, 2007
Application Number:
20070120544
A voltage regulator includes a voltage divider connected between a soft-start pin and the voltage regulator's error amplifier. The voltage divider has the same divider ratio as that of the voltage regulator's feedback voltage divider, which is used to divide the regulated output voltage fed back to the error amplifier. To facilitate soft-start operations, an external, user-supplied capacitor is connected to the soft-start pin. To facilitate voltage tracking operations, a predetermined…
Single Chip Radio Receiver with Decoder and Controllable Baseband Filter
Granted: April 12, 2007
Application Number:
20070082641
A single chip receiver is disclosed herein. The chip only requires an external antenna for operation. A decoder is formed on chip for performing logical operations on demodulated digital data. A baseband filter is controlled by external control signals to have one of a plurality of discrete frequency response bandwidths depending on the type of signal to be received. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for…
Laser Turn-On Accelerator Independent of Bias Control Loop Bandwidth
Granted: March 29, 2007
Application Number:
20070071048
An accelerator circuit is incorporated in a laser diode system for accelerating the turn-on operation of the laser diode independent of the control loop bandwidth of the laser diode system. The accelerator circuit provides a boost current to a compensation capacitor upon laser turn-on which compensation capacitor operates to establish the control loop bandwidth of the laser diode system. The boost current enables the control loop to increase the bias current to the laser diode quickly.…
Analog internal soft-start and clamp circuit for switching regulator
Granted: March 8, 2007
Application Number:
20070052403
An analog soft-start circuit for a switching regulator (e.g., a buck converter) including an analog ramp circuit and an open-loop analog voltage clamp circuit. The voltage ramp circuit utilizes a two-stage current divider circuit to generate a very low, stable current signal, and an integrator circuit including a relatively small, integral capacitor to generate the ramp voltage signal in response to the very low current signal. The analog voltage clamp circuit clamps the regulated output…
In-loop duty corrector delay-locked loop for multiphase clock generation
Granted: March 1, 2007
Application Number:
20070046345
A delay-locked loop (DLL) employs an in-loop duty cycle corrector (DCC) to provide accurate multiphase clock generation with 50% duty cycle. Each delay cell can advantageously provide both delay and duty cycle correction functionality. In one embodiment, delay correction can precede duty cycle correction. The bandwidths of the DCC and the DLL can differ by a factor of a decade to achieve fast and stable operation.
Zero cancellation in multiloop regulator control scheme
Granted: February 8, 2007
Application Number:
20070030074
Control loops in a voltage regulator can be stabilized using minimal silicon area. A current limit signal, generated by a current limit control loop in the voltage regulator, can be divided to minimize a zero provided in a compensation set associated with a voltage control loop, thereby stabilizing both loops. The compensation set can include a resistor (the zero) and a capacitor (a pole) connected in series between output and input terminals of an amplifier. Dividing the current limit…
MOSFET triggered current boosting technique for power devices
Granted: January 11, 2007
Application Number:
20070007934
A voltage regulator output stage can include a power device whose body to source junction is forward biased using a MOSFET trigger. The forward biasing can advantageously reduce the threshold voltage of the power device, thereby effectively increasing its gate drive as well as its output current capability. Controlling the forward biasing using the MOSFET trigger provides minimal leakage, thereby ensuring that the output stage is commercially viable as well as performance enhanced.
Providing accurate detection of chip overheat and local overheat conditions in integrated circuits
Granted: December 28, 2006
Application Number:
20060291123
A thermal shutdown system that can accurately detect a chip overheat condition or a local overheat condition is described. This system can include a first shutdown circuit triggered by the chip overheat condition and a second shutdown circuit triggered by the local overheat condition. The second shutdown circuit can be located near the heat-generating component on the IC. The first shutdown circuit can be located in another area of the IC. A common temperature independent signal, which…
Creating additional phase margin in the open loop gain of a negative feedback amplifier system
Granted: December 7, 2006
Application Number:
20060273771
A low-dropout voltage (LDO) regulator that creates a zero in the open loop gain using a relatively small-sized current control element to divert part of the supplied load current through a “zero” resistor before adding it to the output load. The main part of the output load is passed through a relatively large second current control element, and both the current control elements are controlled by a control signal generated by an error amplifier (e.g., an op-amp). The voltage signal…
Propagation delay characteristic comparator circuit
Granted: November 9, 2006
Application Number:
20060250164
A comparator circuit having improved operational characteristics. A predetermined voltage drop device is provided, such as an exemplary embodiment Schottky diode, having an anode connected to circuit power supply voltage and an output stage of the comparator and a cathode connected to an input stage of the comparator. The predetermined voltage drop device effects a lowering of the power supply voltage for the output stage bias between said power supply voltage and said common voltage.…
