System for improved pressure control in horizontal diffusion furnace scavenger system for controlling oxide growth
Granted: March 4, 2014
Patent Number:
8662886
The present invention relates generally to semiconductor wafer fabrication and more particularly but not exclusively to advanced process control methodologies for controlling oxide formation using pressure. The present invention, in one or more implementations, includes a pressure stabilization system to dynamically adjust scavenger pressure in a furnace during wafer fabrication in relation to a pressure formation range, value, or one or more pressure indicators in a wafer fabrication…
Phase-locked loop having a constant damping ratio
Granted: February 4, 2014
Patent Number:
8643415
A filter circuit in a phase-locked loop circuit includes a capacitor coupled between a control voltage node and a first node; and a variable resistive element coupled between the first node and a ground potential. The variable resistive element has a resistance value modulated by a current proportional to the charge pump current of the charge pump. In one embodiment, the variable resistive element is a MOS transistor biased in the linear region and having a drain-to-source resistance…
Metal-on-passivation resistor for current sensing in a chip-scale package
Granted: February 4, 2014
Patent Number:
8643144
A current sense resistor integrated with an integrated circuit die housed in a chip-scale semiconductor package includes a metal layer formed over a passivation layer of the integrated circuit die where the metal layer having an array of metal pillars extending therefrom. The metal pillars are to be electrically connected to a first conductive electrode and a second conductive electrode external to the chip-scale semiconductor package where the first conductive electrode and the second…
Bi-directional comparator
Granted: January 21, 2014
Patent Number:
8633734
A bi-directional comparator compares two input signals and applies a hysteresis level to the smaller input signal only after the output signal switches logical states and when the two input signals are within a predetermined range of each other. In one embodiment, the hysteresis applied to the smaller input signal is removed when the two input signals are no longer within the predetermined range of each other.
ESD protection for MEMS resonator devices
Granted: January 21, 2014
Patent Number:
8633552
Disclosed herein are MEMS resonator device designs and fabrication techniques that provide protection against electrostatic charge imbalances. In one aspect, a MEMS resonator device includes a substrate, an electrode including a first microstructure supported by the substrate, a resonant element including a second microstructure spaced from the first microstructure by a gap for resonant displacement of the second microstructure within the gap during operation, and a disabled shunt…
Extended drain lateral DMOS transistor with reduced gate charge and self-aligned extended drain
Granted: December 17, 2013
Patent Number:
8609490
A method to form a LDMOS transistor includes forming a gate/source/body opening and a drain opening in a field oxide on a substrate structure, forming a gate oxide in the gate/source/body opening, and forming a polysilicon layer over the substrate structure. The polysilicon layer is anisotropically etched to form polysilicon spacer gates separated by a space in the gate/source/body opening and a polysilicon drain contact in the drain opening. A body region is formed self-aligned about…
Buck DC-DC converter with dual feedback control
Granted: November 26, 2013
Patent Number:
8593125
A buck switching regulator includes a feedback control circuit including a first gain circuit configured to generate a first feedback signal indicative of the regulated output voltage; a ripple generation circuit configured to generate a ripple signal using the switching output voltage and to inject the ripple signal to the first feedback signal; a second gain circuit configured to generate a second feedback signal indicative of the regulated output voltage; an operational…
Method and system for controlled isotropic etching on a plurality of etch systems
Granted: November 12, 2013
Patent Number:
8580585
A method for forming identical isotropic etch patterns in an etch system is disclosed. The method comprises providing a wafer paddle, a wafer, a plurality of identical etch systems, utilizing identical etch recipes within each of the plurality of etch systems, providing a fixed temperature stability time FTST for each system so that the heat transfer from the paddle to the wafer is constant, wherein the FTST is the same on each of the plurality of etch systems; and utilizing the…
Wide range multi-modulus divider in fractional-N frequency synthesizer
Granted: October 22, 2013
Patent Number:
8565368
A multi-modulus divider includes a chain of n dual modulus divider cells in cascade and connected in a ripple configuration where the last (n-k) of the divider cells are state-parked dual modulus divider cells. The state-parked dual modulus divider cells are forced to a given logical state when the divider cell is bypassed. The state-parked dual modulus divider cells ensure that the multi-modulus divider can change between different number of cells without clock glitches or clock errors.…
Single field zero mask for increased alignment accuracy in field stitching
Granted: October 22, 2013
Patent Number:
8563202
A method for stitching a first field mask to a second field mask on a wafer includes providing a photomask with a first set of targets and a second set of targets, printing images of the first set of targets and the second set of targets onto the wafer where the photomask is applied to the wafer having no previous alignment marks formed thereon for the photomask to align to. A first set of alignment marks is formed from the first set of targets and a second set of alignment marks is…
Pump infusion system
Granted: October 8, 2013
Patent Number:
8551038
In a pump infusion system comprising a pump adapted to be attached to a user and to cause infusion of pharmaceutical substances into the user's body, questions regarding the effects of administration of the pharmaceutical substances are provided, answers to said questions are transmitted to an attending staff, said answers are recorded, and said pump is controlled so as to adjust the dose of the pharmaceutical substances in accordance with said answers. Further, for a safe remote…
Metal-on passivation resistor for current sensing in a chip-scale package
Granted: September 10, 2013
Patent Number:
8531004
A current sense resistor integrated with an integrated circuit die where the integrated circuit die is housed in a chip-scale semiconductor package includes a metal layer formed over a passivation layer of the integrated circuit die where the metal layer has an array of metal pillars extending therefrom. The metal pillars are to be electrically connected to a first conductive trace portion and a second conductive trace portion formed on a printed circuit board where the first conductive…
LDMOS transistor with asymmetric spacer as gate
Granted: September 3, 2013
Patent Number:
8525257
The present invention provides a laterally diffused metal oxide semiconductor (LDMOS) transistor and a method for fabricating it. The LDMOS transistor includes an n-type epitaxial layer formed on a p-type substrate, and an asymmetric conductive spacer which acts as its gate. The LDMOS transistor also includes a source and a drain region on either side of the asymmetric conductive spacer, and a channel region formed by ion-implantation on the asymmetric conductive spacer. The height of…
Switching regulator with optimized switch node rise time
Granted: August 20, 2013
Patent Number:
8513937
A driver circuit for controlling a high-side power switch of a switching regulator includes: a logic circuit configured to generate a gate control signal for turning on the power switch; a diode having coupled to a first power supply voltage; a capacitor having a first electrode coupled to the cathode of the diode and a second electrode coupled to the switching output voltage; and a delay circuit configured to receive the gate control signal and to generate a delayed gate control signal.…
Step-down hysteretic current LED driver implementing frequency regulation
Granted: August 20, 2013
Patent Number:
8513904
A step-down hysteretic current LED driver circuit implements frequency regulation to adjust the hysteresis levels of a hysteretic comparator in the control circuit of the LED driver to keep the switching frequency of the inductor current constant. More specifically, the switching frequency of the inductor current is kept constant by increasing or decreasing the hysteresis window of the hysteretic comparator. In this manner, the switching frequency of the LED driver is kept constant or…
Infusion pump
Granted: July 2, 2013
Patent Number:
8475409
Described is an infusion pump comprising electronic infusion regulating means with wired or wireless communication means and a power source, a medicament bag (7) and an infusion device, said infusion device being in fluid communication with said medicament bag (7) and comprising two valves (1, 2), a pressure cavity (4) provided between said two valves (1, 2) and a membrane (3) covering said cavity (4), wherein said infusion device comprises at least two active actuators, preferably…
System and method for transmitter electromagnetic interference (EMI) reduction
Granted: June 11, 2013
Patent Number:
8462880
A device for Electro-Magnetic Interference (EMI) reduction in an Ethernet system has an Ethernet compatible device. The Ethernet compatible device has a filter for adjusting a signal outputted by the Ethernet compatible device for EMI reduction.
Extended drain lateral DMOS transistor with reduced gate charge and self-aligned extended drain
Granted: May 28, 2013
Patent Number:
8450814
A method to form a LDMOS transistor includes forming a gate/source/body opening and a drain opening in a field oxide on a substrate structure, forming a gate oxide in the gate/source/body opening, and forming a polysilicon layer over the substrate structure. The polysilicon layer is anisotropically etched to form polysilicon spacer gates separated by a space in the gate/source/body opening and a polysilicon drain contact in the drain opening. A body region is formed self-aligned about…
Single field zero mask for increased alignment accuracy in field stitching
Granted: May 14, 2013
Patent Number:
8440372
A single field photomask includes a first set of targets formed on a first side of the photomask, and a second set of targets formed on a second side of the photomask, opposite the first side. In operation, the photomask is to be applied to a wafer without any alignment marks. The photomask forms a first set of alignment marks in the wafer from the first set of targets, and the photomask further forms a second set of alignment marks in the wafer from the second set of targets. The first…
Buck-boost converter with smooth transitions between modes
Granted: May 7, 2013
Patent Number:
8436591
In a buck-boost converter, the method compensates for the boost mode power switch having a minimum on-time when entering the buck-boost mode from the buck mode by immediately decreasing a duty cycle of the buck mode power switch upon entering the buck-boost mode. This prevents the inductor current from being higher at the end of the switching cycle than at the beginning of the cycle, so the output voltage stays regulated without the converter oscillating between the buck mode and the…
