Single field zero mask for increased alignment accuracy in field stitching
Granted: May 14, 2013
Patent Number:
8440372
A single field photomask includes a first set of targets formed on a first side of the photomask, and a second set of targets formed on a second side of the photomask, opposite the first side. In operation, the photomask is to be applied to a wafer without any alignment marks. The photomask forms a first set of alignment marks in the wafer from the first set of targets, and the photomask further forms a second set of alignment marks in the wafer from the second set of targets. The first…
Buck-boost converter with smooth transitions between modes
Granted: May 7, 2013
Patent Number:
8436591
In a buck-boost converter, the method compensates for the boost mode power switch having a minimum on-time when entering the buck-boost mode from the buck mode by immediately decreasing a duty cycle of the buck mode power switch upon entering the buck-boost mode. This prevents the inductor current from being higher at the end of the switching cycle than at the beginning of the cycle, so the output voltage stays regulated without the converter oscillating between the buck mode and the…
Universal input apparatus
Granted: April 9, 2013
Patent Number:
RE44134
Input structures and topologies are provided for coupling a differential input into a first stage of a circuit, topology, or device. An input pin is coupled to an impedance divider that translates an input voltage to accommodate low input voltage levels, while not saturating an input differential pair. A termination pair with a center tap pin is further coupled to the input pins. The center tap facilitates coupling different termination configurations to the input signal. The topologies…
High bandwidth dual programmable transmission line pre-emphasis method and circuit
Granted: February 19, 2013
Patent Number:
8379701
In one embodiment, a transmission line pre-emphasis circuit includes a primary signal path generating a primary differential output current indicative of a digital data stream and a secondary signal path including a pulse shaping stage incorporating a network and a scaling stage. The pre-emphasis circuit generates an overshoot pulse with variable pulse width. In another embodiment, a transmission line pre-emphasis circuit includes a primary signal path generating a primary differential…
High bandwidth programmable transmission line pre-emphasis method and circuit
Granted: February 19, 2013
Patent Number:
8379702
In one embodiment, a transmission line pre-emphasis circuit includes a primary signal path generating a primary differential output current indicative of a digital data stream and a secondary signal path including a pulse shaping stage incorporating a network and a scaling stage. The pre-emphasis circuit generates an overshoot pulse with variable pulse width. In another embodiment, a transmission line pre-emphasis circuit includes a primary signal path generating a primary differential…
Load swtch for removing high frequency ripple, noise and/or spikes while providing power to subsystems
Granted: February 19, 2013
Patent Number:
8378658
A semiconductor device, circuit, and AC and DC load switch for maintaining a small input-output differential voltage and providing a defined response. The load switch can include a pass element coupled to an input terminal and an output terminal. The pass element can include a control terminal, with the control terminal controlling a response of the pass element. The load switch can include a first loop coupled to the control terminal configured to control a voltage drop between the…
Polarity independent laser monitor diode current sensing circuit for optical modules
Granted: November 27, 2012
Patent Number:
8320420
A laser bias control and monitoring circuit receives a monitor diode current on an input node and generate a bias current for a laser diode on an output node where the monitor diode current flows into (positive polarity) or out of (negative polarity) the input node. The laser bias control and monitoring circuit includes a polarity independent current sensing circuit configured to receive the monitor diode current in either positive or negative polarity and to generate a normalized output…
High bandwidth programmable transmission line pre-emphasis method and circuit
Granted: October 23, 2012
Patent Number:
8295336
A transmission line pre-emphasis circuit includes a primary signal path receiving a digital data stream and generating a primary output current indicative of the digital data stream, one or more secondary signal paths each incorporating a network implementing a specific transient response where the one or more secondary signal paths receive the digital data stream and generate secondary output currents representing one or more overshoot signals indicative of the transient response of the…
System for vertical DMOS with slots
Granted: July 24, 2012
Patent Number:
8227860
A device for providing a high power, low resistance, efficient vertical DMOS device is disclosed. The device comprises providing a semiconductor substrate with a source body structure thereon. The device further comprises a plurality of slots in the source/body structure and providing a metal within the plurality of slots to form a plurality of structures. A slotted PowerFET array is disclosed. This slotted approach results in a dense PowerFET, a low Ron due to the slotted design, an…
Universal pinout for both receiver and transceiver with loopback
Granted: July 3, 2012
Patent Number:
8212586
An integrated circuit capable of dual configuration of data flow and operable in a plurality of operational modes is provided. The circuit includes eight corner pins, wherein the eight corner pins comprise a first corner pin and a second corner pin on each side of the circuit in each of four side sets, wherein a first corner pin of one side of the circuit is proximate and adjacent to a second corner pin of an adjacent side counterclockwise from the first corner pin and together…
Low current method for detecting presence of Ethernet signals
Granted: June 26, 2012
Patent Number:
8208387
A signal detection circuit for an Ethernet physical layer transceiver (PHY) device includes a first capacitor AC coupling a signal on the first receive terminal of the Ethernet PHY device to a first node; a second capacitor AC coupling a signal on the second receive terminal to a second node; re-biasing resistors for re-biasing the AC-coupled signals on the first and second nodes; first and second gain stages for amplifying the AC coupled signals; and a peak detect circuit. The peak…
Pulse width modulation circuits and methods
Granted: March 27, 2012
Patent Number:
8144760
Noise reducing circuitry may be included in a pulse width modulation circuit. The pulse width modulation circuit may include a comparator adapted to receive an analog signal and a sawtooth signal and to compare such signals to generate a pulse width output. In general, the noise reducing circuitry may include a sawtooth signal generating circuit configured to generate a sawtooth signal including an up ramp and a sawtooth signal including a down ramp. A control circuit may be coupled to…
High bandwidth programmable transmission line equalizer
Granted: March 20, 2012
Patent Number:
8138851
A transmission line equalizer includes multiple signal paths connected in parallel between an equalizer input signal and an output amplifier where each signal path has a network implementing a specific frequency dependent response and each signal path implements current gain amplification with one or more of the signal paths having a variable gain programmed through a time invariant, DC programming signal. Furthermore, one or more of the signal paths implements linear-to-nonlinear signal…
Current mirror circuit
Granted: February 28, 2012
Patent Number:
8125162
The present invention provides a current mirror circuit for matching current between two LEDs. The current mirror circuit includes a first sub-circuit, including a first transistor, a second transistor, and a first OPAMP, and a second sub-circuit including a third transistor, a fourth transistor, and a second OPAMP. The first sub-circuit is connected to a first LED and the second sub-circuit is connected to a second LED. The current mirror circuit also includes four switches which…
Lateral DMOS field effect transistor with reduced threshold voltage and self-aligned drift region
Granted: February 21, 2012
Patent Number:
8120105
A method of forming a lateral DMOS transistor includes performing a low energy implantation using a first dopant type and being applied to the entire device area. The dopants of the low energy implantation are blocked by the conductive gate. The method further includes performing a high energy implantation using a third dopant type and being applied to the entire device area. The dopants of the high energy implantation penetrate the conductive gate and is introduced into the entire…
Method of operating radio receiver implemented in a single CMOS integrated circuit
Granted: January 10, 2012
Patent Number:
8095105
A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in…
Buck-boost converter with sample and hold circuit in current loop
Granted: December 27, 2011
Patent Number:
8085005
In an average-current mode control type buck-boost PWM converter, a sample and hold circuit is inserted in the current loop to avoid problems associated with ripple of the average inductor current demand signal. The rippling average inductor current is generated by a differential transconductance amplifier having applied to its inputs an error signal and a signal corresponding to the instantaneous current through the inductor, where the output of the amplifier is filtered. The rippling…
Line driver with tuned on-chip termination
Granted: September 20, 2011
Patent Number:
8022736
A line driver includes current sources and resistors that form a bridge circuit in which a bridge resistor is connected between an internal node and ground, and a series resistor connected between the internal node and the driver's output node. The internal node is connected to receive a unit current from a first stage transistor, and the output node is connected to receive an amplified current from a second stage transistor that is N times the unit current. The bridge resistor is formed…
Parallel analog and digital timers in power controller circuit breaker
Granted: September 13, 2011
Patent Number:
8018704
A circuit breaker for a power controller integrated circuit is described where an analog timer and a digital timer are provided in parallel. The digital timer provides a fixed, on-chip maximum delay during an overcurrent condition to ensure the transistor will not be damaged. The analog timer allows the user to select an external capacitor or resistor to provide a delay time that is shorter than the time provided by the digital timer. Accordingly, the power controller retains all the…
Field effect transistor with trench-isolated drain
Granted: August 23, 2011
Patent Number:
8004039
A MOS transistor includes a body region of a first conductivity type, a conductive gate and a first dielectric layer, a source region of a second conductivity type formed in the body region, a heavily doped source contact diffusion region formed in the source region, a lightly doped drain region of the second conductivity type formed in the body region where the lightly doped drain region is a drift region of the MOS transistor, a heavily doped drain contact diffusion region of the…
