Edge detect receiver circuit
Granted: September 21, 2010
Patent Number:
7800434
A digital signal detector detects digital signals by only sensing the rising and falling edges of a received digital signal and latches the logic state between the detected edges. Such edges contain very high frequencies that are much higher than the fundamental frequency of the digital signal train. A small high pass filter filters out at least the DC component and the fundamental frequency of the received digital signal. A filtered edge appears as a spike that goes either positive or…
True ring networks with gateway connections using MAC source address filtering
Granted: September 21, 2010
Patent Number:
7801141
A method in a network device implements source address filtering, including gateway address filtering, to enable network devices to be configured in a true Ethernet ring network. By implementing source address filtering or source address filtering with gateway address filtering, a true ring network can be formed using Ethernet protocols where all the links between the network devices in the ring are active paths while avoiding data packets being switched endlessly around the ring. In one…
Stacked LED controllers
Granted: September 21, 2010
Patent Number:
7800316
A driver for driving a plurality of light emitting diodes (LEDs) is formed of a plurality of LED controllers connected in series between a power supply and a reference voltage. Each controller drives one or more LEDs directly connected to it. Each controller has a voltage input terminal coupled to an output terminal of an adjacent upstream controller, and an output terminal coupled to the voltage input terminal of an adjacent downstream controller. Each controller has a normally-on…
Integrated circuit including a high voltage bipolar device and low voltage devices
Granted: July 20, 2010
Patent Number:
7759759
An integrated circuit includes a high voltage NPN bipolar transistor and a low voltage device. The NPN bipolar transistor includes a lightly doped p-well as the base region of the transistor while the low voltage devices are built using standard, more heavily doped p-wells. By using a process including a lightly doped p-well and a standard p-well, high and low voltage devices can be integrated onto the same integrated circuit. In one embodiment, the lightly doped p-well and the standard…
Adaptive compensation scheme for LC circuits in feedback loops
Granted: July 20, 2010
Patent Number:
7759912
A method for providing adaptive compensation for an electrical circuit where the electrical circuit includes an inductor-capacitor network connected in a feedback loop being compensated by a first compensation capacitance value and a second compensation capacitance value defining the frequency locations of two compensation zeros includes: measuring the inductance value of the inductor; when the inductance value is greater than a first threshold value, increasing the first and second…
Current sensing in a buck-boost switching regulator using integrally embedded PMOS devices
Granted: July 20, 2010
Patent Number:
7759923
A current sense device for a power transistor is described. The power transistor is formed in a cellular structure including a cellular array of transistor cells. The current sense device includes multiple transistor cells in the cellular array of transistor cells of the power transistor being used as sense transistor cells. The sense transistor cells are evenly distributed throughout the cellular array where the source terminal of each sense transistor cell is electrically connected to…
Integrated circuit system for controlling amplifier gain
Granted: July 6, 2010
Patent Number:
7750736
An integrated circuit system comprising: forming a differential amplifier including: forming a first transistor, coupling a second transistor to the first transistor in a high gain configuration, and coupling a third transistor, having a low gain configuration, in parallel with the second transistor; and adjusting a gain of the differential amplifier by adjusting a ratio of the size of the second transistor to the size of the first transistor.
Tester for RF devices
Granted: June 29, 2010
Patent Number:
7746053
For testing an RF device, such as an RF receiver/decoder chip that receives an RF signal via an antenna terminal and outputs a digital code at an output terminal, an inexpensive non-RF programmable tester is used. The programmable tester is a commercially available tester that need only generate and receive non-RF digital and analog signals. The RF signals needed for the testing of the RF device are totally supplied by RF generators on a single printed circuit board, external to the…
Circuit and method for providing a fail-safe differential receiver
Granted: June 29, 2010
Patent Number:
7746150
A fail-safe differential receiver having a differential amplifier adapted to receive first and second differential input signals and generate a differential voltage. A peak detector is coupled to the differential amplifier for generating a detect signal and a comparator is coupled to the peak detector for comparing the detect signal to a threshold voltage and providing a comparison signal. A directing circuit is coupled to the differential amplifier for receiving the first and second…
Laser driver automatic power control circuit using non-linear impedance circuit
Granted: June 15, 2010
Patent Number:
7738519
A laser driver circuit includes a laser APC circuit receiving a monitor current indicative of the average optical output power of a laser diode and providing a bias adjust signal for adjusting a bias current for the laser diode. The laser APC circuit includes a first non-linear impedance circuit receiving the monitor current and generating a first voltage using a first non-linear current-to-voltage transfer function, a second non-linear impedance circuit receiving a reference current and…
Circuit and method for limiting power to a load
Granted: June 15, 2010
Patent Number:
7738225
A circuit and method for limiting the power supplied to a load are provided. The circuit and method prevent power supplied to the load from exceeding a power threshold for a programmable amount of time specified in a timer. The circuit includes a voltage controlled current source coupled to the load. A current multiplier divider is coupled to the voltage controlled current source and a timer is coupled to the load. A comparator with an adaptive threshold is coupled to the current…
Bandgap-referenced thermal sensor
Granted: May 25, 2010
Patent Number:
7724068
A thermal sensor for an integrated circuit including a bandgap reference circuit. The thermal sensor includes a comparator that compares a temperature dependent voltage generated by the bandgap reference circuit to a temperature independent voltage, where both temperatures are referenced to the bandgap reference voltage generated by the bandgap reference circuit. The thermal sensor generates a digital output control signal based on a predetermined relationship between the temperature…
No-trim low-dropout (LDO) and switch-mode voltage regulator circuit and technique
Granted: May 11, 2010
Patent Number:
7714640
An optimized output voltage circuit and technique obtainable without trimming is set forth. A voltage reference circuit and method devoid of trim resistors comprising a high gain amplifier, a plurality of bandgap resistors, and at least a plurality of bipolar devices interconnected across circuitry in a predetermined configuration having emitter areas greater than traditional emitter areas of traditional bipolar devices is set forth.
Input buffer circuit
Granted: April 27, 2010
Patent Number:
7705655
An input buffer circuit. In one embodiment, the input buffer circuit includes a first transistor operable to receive a first input signal, a second transistor operable to receive a second input signal, and a first mechanism coupled to the first transistor and to the second transistor. The first mechanism is operable to control the first and second transistors such that the first and second transistors can receive either single-ended input signals or differential input signals. According…
Fully integrated ALL- CMOS AM transmitter with automatic antenna tuning
Granted: April 6, 2010
Patent Number:
RE41207
A monolithic AM transmitter is disclosed. An external antenna forms part of a resonance network so that the antenna resonance point is automatically tuned to the transmit frequency. This provides flexibility with no added cost to the transmitter.
Slew rate controlled level shifter with reduced quiescent current
Granted: March 16, 2010
Patent Number:
7679420
A level shifter circuit includes two parallel current paths respectively controlled by switch transistors, a Wilson current mirror circuit, and a slew rate control circuit to selectively couple an output node either to a high (first) voltage source or to a ground (second voltage) source in response to differential input control signals signal. When the output node reaches a stable (high or low) voltage level, the low voltage on one of the current paths turns off a Wilson current mirror…
Power distribution current limiting switch including a current limit blanking period providing a burst of current
Granted: March 9, 2010
Patent Number:
7675278
A method for operating a current limit power switch for supplying power to a load include activating the power switch to start supplying power to the load; limiting the current drawn by the power switch to a first current limit for a first, fixed duration; after the first, fixed duration, limiting the current drawn by the power switch to a second current limit for a second duration where the second current limit is less than the first current limit; and after the second duration,…
Address generation method for combining multiple selection results
Granted: March 9, 2010
Patent Number:
7676537
A method in an integrated circuit for generating an address value having a contiguous address range from a first selection result and a second selection result each being an one-of-k selection result includes selecting multiple multiplication factors being power-of-two multiplication factors and the sum of the multiplication factors being equal to k; shifting the first selection result towards the most significant bit by each of the multiplication factors to generate multiple shifted…
System and method for phase-locked loop (PLL) for high-speed memory interface (HSMI)
Granted: February 9, 2010
Patent Number:
7659783
A phase-locked loop (PLL) to provide clock generation for high-speed memory interface is presented as the innovate PLL (IPLL). The IPLL architecture is able to tolerate external long loop delay without deteriorating jitter performance. The IPLL comprises in part a common mode feedback circuit with a current mode approach, so as to minimize the effects of mismatch in charge-pump circuit, for instance. The voltage-controlled oscillator (VCO) of the IPLL is designed using a mutually…
Creating additional phase margin in the open loop gain of a negative feedback amplifier system using a boost zero compensating resistor
Granted: February 2, 2010
Patent Number:
7656139
A low-dropout voltage (LDO) regulator that creates a zero in the open loop gain using a relatively small-sized current control element to divert part of the supplied load current through a “zero” resistor before adding it to the output load. The main part of the output load is passed through a relatively large second current control element. A control signal generated by an error amplifier (e.g., an op-amp) is used to control the small current control element, but is passed through a…
