TECHNIQUE FOR REDUCING BANDWIDTH CONSUMPTION DURING FRAME ROTATION
Granted: November 27, 2014
Application Number:
20140347379
A decode engine is configured to perform a rotation operation with a macroblock in conjunction with performing a deblocking operation that involves the macroblock. The decode engine decodes the macroblock and performs the deblocking operation to generate a deblocked macroblock, then rotates the deblocked macroblock and writes the rotated, deblocked macroblock to memory. With this approach, multiple, redundant reads of the macroblock, as required with conventional rotation techniques, may…
METHOD AND SYSTEM FOR ADJUSTING SCREEN ORIENTATION OF A MOBILE DEVICE
Granted: November 27, 2014
Application Number:
20140347397
A method and system for adjusting a screen orientation of a mobile device is provided in the embodiments of the present invention. The method includes obtaining a face image of a user. The method includes extracting location information of two eyes from the face image. The method includes determining a direction vector of a face in the face image according to the location information of the two eyes in the face image. The method includes determining a location relationship between the…
MOBILE DEVICE AND SYSTEM FOR GENERATING PANORAMIC VIDEO
Granted: November 27, 2014
Application Number:
20140347439
A system and mobile device for generating a panoramic video is presented. The system comprises a plurality of cameras and a mobile device. The mobile device further comprises a CPU and a GPU. The plurality of cameras is operable to capture video frames from different directions through 360° to generate multi-channel video streams. The CPU is configured to issue to the GPU an instruction to process the multi-channel video streams. The GPU is configured to mosaic synchronous video frames…
EIGHT TRANSISTOR (8T) WRITE ASSIST STATIC RANDOM ACCESS MEMORY (SRAM) CELL
Granted: November 27, 2014
Application Number:
20140347916
Disclosed are devices, systems and/or methods relating to an eight transistor (8T) static random access memory (SRAM) cell, according to one or more embodiments. In one embodiment, an SRAM storage cell is disclosed comprising a word line, a write column select line, a cross-coupled data latch, and a first NMOS switch device serially coupled to a second NMOS switch device. In this embodiment, the gate node of the first NMOS switch device is coupled to the word line, a source node of the…
SCHEDULING MODIFICATION FOR EXPECTED PUBLIC WARNING SYSTEM MESSAGE
Granted: November 27, 2014
Application Number:
20140348072
One aspect provides a modem for use at a terminal. The modem comprises a first interface and a processing unit. The first interface is arranged to connect to a communications network. The processing unit is arranged to receive a message from the communications network via the first interface whilst in an operating mode. The processing unit is also arranged to assess the message on receipt to determine that one or more public warning message is to be broadcast to the modem from the…
SORTING WITH KEY MODIFICATION
Granted: November 27, 2014
Application Number:
20140351276
This disclosure is directed to systems and methods for sorting data in which pre-sorting operations are performed on keys prior to those keys being reordered within memory. One example method includes generating, for each of a plurality of keys, an associated modified key. This operation is an example pre-sorting operation that occurs prior to any reordering of the keys. Once the modified keys are generated, the modified keys and/or associated information are processed in order to change…
SYSTEM AND METHOD FOR DYNAMICALLY REDUCING POWER CONSUMPTION OF FLOATING-POINT LOGIC
Granted: November 27, 2014
Application Number:
20140351308
A system and method are provided for dynamically reducing power consumption of floating-point logic. A disable control signal that is based on a characteristic of a floating-point format input operand is received and a portion of a logic circuit is disabled based on the disable control signal. The logic circuit processes the floating-point format input operand to generate an output.
CACHE-EFFICIENT PROCESSOR AND METHOD OF RENDERING INDIRECT ILLUMINATION USING INTERLEAVING AND SUB-IMAGE BLUR
Granted: November 27, 2014
Application Number:
20140347359
A cache-efficient processor and method for rendering indirect illumination using interleaving and sub-image blur. One embodiment of the processor is configured to render an indirect illumination image and includes: (1) a buffer restructurer configured to organize a reflective shadow map (RSM), rendered with respect to a reference point, into a plurality of unique sub-RSMs, each having sub-RSM pixels, (2) an indirect illumination computer configured to employ interleaved sampling on the…
TECHNIQUES FOR SHARING PRIORITIES BETWEEN STREAMS OF WORK AND DYNAMIC PARALLELISM
Granted: November 20, 2014
Application Number:
20140344821
One embodiment sets forth a method for assigning priorities to kernels launched by a software application and executed within a stream of work on a parallel processing subsystem that supports dynamic parallelism. First, the software application assigns a maximum nesting depth for dynamic parallelism. The software application then assigns a stream priority to a stream. These assignments cause a driver to map the stream priority to a device priority and, subsequently, associate the device…
TECHNIQUES FOR ASSIGNING PRIORITIES TO MEMORY COPIES
Granted: November 20, 2014
Application Number:
20140344528
One embodiment sets forth a method for guiding the order in which a parallel processing subsystem executes memory copies. A driver creates semaphores for all but the lowest priority included in a plurality of priorities and associates one priority with each copy hardware channel included in the parallel processing subsystem. The driver then aliases prioritized streams to the copy hardware channels based on the priorities. Upon receiving a request to execute a memory copy within one of…
LOW POWER MODE EXIT LATENCY PREDICTOR FOR REAL-TIME ASYMMETRIC MULTIPROCESSOR SYSTEMS
Granted: November 20, 2014
Application Number:
20140342727
In an aspect there is provided a method of moving a processor of a mobile device from a low-power state for conserving power to an active mode for processing signals. The mobile device is configured to receive regularly scheduled signals. The method comprises, for each of multiple operating states of the mobile device determining a restore time associated with the operating state of the mobile device and storing each determined restore time in association with its operating state. The…
MESSAGE HANDLING
Granted: November 20, 2014
Application Number:
20140342723
A method of handling messages at a user equipment received from a communications network during a procedure, the method implemented at the user equipment comprising: receiving a first message from the network whilst the user equipment is in a first operating state; processing the first message and entering a second operating state in response to receiving the first message; receiving a second message from the network whilst the user equipment is in the second operating state; detecting…
DYNAMIC PUBLIC WARNING SYSTEM DEACTIVATION
Granted: November 20, 2014
Application Number:
20140342687
One aspect provides a method of operating a modem at a terminal. The modem is arranged to store one or more message identifier. Each of the one or more message identifier identifies a type of message that the modem is arranged to act upon when received on a broadcast channel from a communications network. The method comprises detecting a country that the terminal is located in. The method further comprises determining if the detected country is a country in which a public warning system…
REDUCING SUPERFLUOUS TRAFFIC IN A NETWORK
Granted: November 20, 2014
Application Number:
20140341028
In one embodiment the modem has a network interface, application interface, processor, and memory. The network interface exchanges radio data with a network. The application (or host) interface exchanges application data with an application (or host) processor. The processor converts a unit of radio data to a corresponding unit of application data. The memory stores each unit of application data received by the modem. The processor is configured to execute a selective discard function to…
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR UTILIZING A WAVEFRONT PATH TRACER
Granted: November 20, 2014
Application Number:
20140340403
A system, method, and computer program product are provided for utilizing a wavefront path tracer. In use, a set of light transport paths associated with a scene is identified. Additionally, parallel path tracing is performed, utilizing a wavefront path tracer.
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT TO PRODUCE IMAGES FOR A NEAR-EYE LIGHT FIELD DISPLAY
Granted: November 20, 2014
Application Number:
20140340389
A system, method, and computer program product are provided for producing images for a near-eye light field display. A ray defined by a pixel of a microdisplay and an optical apparatus of a near-eye light field display device is identified and the ray is intersected with a two-dimensional virtual display plane to generate map coordinates corresponding to the pixel. A color for the pixel is computed based on the map coordinates. The optical apparatus of the near-eye light field display…
ANTENNA AND ELECTRONIC DEVICE INCLUDING THE SAME
Granted: November 20, 2014
Application Number:
20140340262
Provided, in one aspect, is an antenna. The antenna, in this aspect, includes an active element, the active element having a resonant portion operable to effect an antenna for communication in a band of frequencies. The antenna, of this aspect, further includes a ground element. In this aspect, the ground element and active element are structurally equivalent or functionally equivalent.
DUAL BAND ANTENNA
Granted: November 20, 2014
Application Number:
20140340261
Provided is a dual band antenna. The dual band antenna, in this aspect, includes an active element, the active element having a first resonant portion operable to effect a first antenna for communication in a first band of frequencies, and a second resonant portion operable to effect a second antenna for communication in a second different band of frequencies. The dual band antenna, of this aspect, further includes a ground element. In this aspect, the ground element and active element…
INTEGRATED CIRCUIT PACKAGE WITH AN INTERPOSER FORMED FROM A REUSABLE CARRIER SUBSTRATE
Granted: November 20, 2014
Application Number:
20140339706
An integrated circuit package includes an interposer and an integrated circuit die. The interposer is formed from a layer of semiconductor material that is separated from a bulk portion of a semiconductor substrate, and the integrated circuit die is coupled to the interposer. Vias in the interposer can be formed in the thin layer of semiconductor material removed from the semiconductor substrate, and therefore can be scaled down significantly in size. Such reduced-size,…
IINTEGRATED CIRCUIT PACKAGE USING SILICON-ON-OXIDE INTERPOSER SUBSTRATE WITH THROUGH-SILICON VIAS
Granted: November 20, 2014
Application Number:
20140339705
An integrated circuit package includes an integrated circuit package comprising an interposer and an integrated circuit die. The interposer is formed from a silicon-on-insulator semiconductor substrate and includes a plurality of through-silicon vias, and the integrated circuit die is electrically coupled to a first through-silicon via included in the plurality of through-silicon vias. Through-silicon vias in the integrated circuit package can be formed in the thin silicon surface layer…
