Data center job scheduling using machine learning
Granted: January 21, 2025
Patent Number:
12206748
A method includes receiving, using a processing device, a first condition associated with an operation at a data center, where the operation at the data center pertains to a first location at the data center, the first location corresponding to a first parameter value. The method further includes providing the first condition as an input to a machine learning model. The method also includes performing one or more reinforcement learning techniques using the machine learning model to cause…
Pixel degradation tracking and compensation for display technologies
Granted: January 21, 2025
Patent Number:
12205534
Certain display types—such as organic light emitting diode (OLED) displays—may be more prone to burn-in or ghosting due to the varied luminance degradation rates of pixel cells of the display—especially in applications or content types that require display of prolonged, continuous, static textures. To account for this, aging of pixel cells (e.g., R, G, B, and/or W pixel cells) of a display may be tracked such that more aged pixel cells may be compensated for by reducing pixel…
Conversational AI platform with rendered graphical output
Granted: January 21, 2025
Patent Number:
12205210
In various examples, a virtually animated and interactive agent may be rendered for visual and audible communication with one or more users with an application. For example, a conversational artificial intelligence (AI) assistant may be rendered and displayed for visual communication in addition to audible communication with end-users. As such, the AI assistant may leverage the visual domain—in addition to the audible domain—to more clearly communicate with users, including…
Application programming interface to wait on matrix multiply-accumulate
Granted: January 21, 2025
Patent Number:
12204897
Apparatuses, systems, and techniques to perform computational operations in response to one or more compute uniform device architecture (CUDA) programs. In at least one embodiment, one or more computational operations are to cause one or more other computational operations to wait until a portion of matrix multiply-accumulate (MMA) operations have been performed.
Using a hardware sequencer in a direct memory access system of a system on a chip
Granted: January 21, 2025
Patent Number:
12204475
In various examples, a VPU and associated components may be optimized to improve VPU performance and throughput. For example, the VPU may include a min/max collector, automatic store predication functionality, a SIMD data path organization that allows for inter-lane sharing, a transposed load/store with stride parameter functionality, a load with permute and zero insertion functionality, hardware, logic, and memory layout functionality to allow for two point and two by two point lookups,…
Safety decomposition architecture for autonomous machine applications
Granted: January 21, 2025
Patent Number:
12202518
In various examples, a safety decomposition architecture for autonomous machine applications is presented that uses two or more individual safety assessments to satisfy a higher safety integrity level (e.g., ASIL D). For example, a behavior planner may be used as a primary planning component, and a collision avoidance feature may be used as a diverse safety monitoring component—such that both may redundantly and independently prevent violation of safety goals. In addition, robustness…
Restraint device localization
Granted: January 21, 2025
Patent Number:
12202432
Systems and methods are disclosed related to restraint device (e.g., seatbelt) localization. In one embodiment, the disclosure relates to systems and methods for seatbelt detection and modeling. A vehicle may be occupied by one or more occupants wearing one or more seatbelts. A camera or other sensor is placed within the vehicle to capture images of the one or more occupants. A system analyzes the images to detect and model seatbelts depicted in the images. Specifically, the system may…
Neural networks to generate robotic task demonstrations
Granted: January 21, 2025
Patent Number:
12202147
A technique for training a neural network, including generating a plurality of input vectors based on a first plurality of task demonstrations associated with a first robot performing a first task in a simulated environment, wherein each input vector included in the plurality of input vectors specifies a sequence of poses of an end-effector of the first robot, and training the neural network to generate a plurality of output vectors based on the plurality of input vectors. Another…
Systems and methods for performing operations in a vehicle using gaze detection
Granted: January 14, 2025
Patent Number:
12198450
In various examples, systems and methods are disclosed herein for a vehicle command operation system that may use technology across multiple modalities to cause vehicular operations to be performed in response to determining a focal point based on a gaze of an occupant. The system may utilize sensors to receive first data indicative of an eye gaze of an occupant of the vehicle. The system may utilize sensors to receive second data indicative of other data from the occupant. The system…
Intelligent and integrated liquid-cooled rack for datacenters
Granted: January 14, 2025
Patent Number:
12200913
A cooling system for a datacenter is disclosed. The datacenter cooling system includes a cooling manifold having a first controllable fluid coupler to receive a coolant from a cooling loop external to the rack and one or more second controllable fluid couplers to distribute the coolant to one or more server cooling manifolds within server trays of a rack within the datacenter.
Mini-map based position tracking
Granted: January 14, 2025
Patent Number:
12194383
Apparatuses, systems, and techniques to determine position information for a gameplay session. In at least one embodiment, the position information is determined by at least matching features extracted from a mini-map to feature extracted from a map and determining a transformation matrix to be applied to a position within the mini-map.
Early release of resources in ray tracing hardware
Granted: January 14, 2025
Patent Number:
12198256
Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results,…
Query-specific behavioral modification of tree traversal
Granted: January 14, 2025
Patent Number:
12198255
Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and…
Method for handling of out-of-order opaque and alpha ray/primitive intersections
Granted: January 14, 2025
Patent Number:
12198253
A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based…
Reducing false positive ray traversal using point degenerate culling
Granted: January 14, 2025
Patent Number:
12198252
Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.
Reducing false positive ray traversal in a bounding volume hierarchy
Granted: January 14, 2025
Patent Number:
12198251
Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.
Programming model for resource-constrained scheduling
Granted: January 14, 2025
Patent Number:
12197954
The present technology augments the GPU compute model to provide system-provided data marshalling characteristics of graphics pipelining to increase efficiency and reduce overhead. A simple scheduling model based on scalar counters (e.g., semaphores) abstract the availability of hardware resources. Resource releases can be done programmatically, and a system scheduler only needs to track the states of such counters/semaphores to make work launch decisions. Semantics of the…
Hardware-efficient PAM-3 encoder and decoder
Granted: January 14, 2025
Patent Number:
12197281
A transceiver configured to communicate a burst of data bits and meta-data bits for the data bits includes data channels, auxiliary data channels, and at least one error correction channel. The transceiver includes an encoder that applies 11b7s encoding to a first number of the data bits to generate first PAM-3 symbols on some or all of the communication channels, and that applies 3b2s encoding to a second number of the data bits to generate second PAM-3 symbols on at least some of the…
Hang recovery and error reporting architecture on FPGA-based controller solutions
Granted: January 14, 2025
Patent Number:
12197272
A system includes a device having a controller a plurality of finite state machines (FSMs). The device is to detect that one or more FSMs of the plurality of FSMs fails to satisfy a non-idle duration criterion during an operation, where the one or more FSM that fail to satisfy the non-idle duration criterion are associated with one or more errors. The device is to determine a location of the one or more FSMs that fail to satisfy the non-idle duration criterion. The device is to record…
Robotic control system
Granted: January 14, 2025
Patent Number:
12194632
In at least one embodiment, under the control of a robotic control system, a gripper on a robot is positioned to grasp a 3-dimensional object. In at least one embodiment, the relative position of the object and the gripper is determined, at least in part, by using a camera mounted on the gripper.