Integrated circuit physical security device having a security cover for an integrated circuit
Granted: November 12, 2024
Patent Number:
12142580
Devices and methods for physical chip security are disclosed. In at least one embodiment, a security module is secured to a board to restrict physical access to an integrated circuit mounted on the security module and provides one or more contacts enabling data access to the integrated circuit.
Data compression for a neural network
Granted: November 12, 2024
Patent Number:
12141689
Systems and methods for generating a representative value of a data set by first compressing a portion of values in the data set to determine a first common value and further compressing a subset of the portion of values to determine a second common value. The representative value is generated by taking the difference between the first common value and the second common value, wherein the representative value corresponds to a mathematical relationship between the first and second common…
Virtual channel starvation-free arbitration for switches
Granted: November 5, 2024
Patent Number:
12137055
A switching system having input ports and output ports and comprising an input queued (IQ) switch with virtual channels. Typically, only one virtual channel can, at a given time, access a given output port. Typically, the IQ switch includes an arbiter apparatus that controls the input ports and output ports to ensure that an input port transmits at most one cell at a time, and/or that an output port receives a cell over only one virtual channel, and/or an output port receives at most one…
Glare mitigation using image contrast analysis for autonomous systems and applications
Granted: November 5, 2024
Patent Number:
12136249
In various examples, contrast values corresponding to pixels of one or more images generated using one or more sensors of a vehicle may be computed to detect and identify objects that trigger glare mitigating operations. Pixel luminance values are determined and used to compute a contrast value based on comparing the pixel luminance values to a reference luminance value that is based on a set of the pixels and the corresponding luminance values. A contrast threshold may be applied to the…
Implementing hardware-based memory safety for a graphic processing unit
Granted: November 5, 2024
Patent Number:
12135781
While a compiler compiles source code to create an executable binary, code is added into the compiled source code that, when executed, identifies and stores in a metadata table base and bounds information associated with memory allocations. Additionally, additional code is added into the compiled source code that enables hardware to determine a safety of memory access requests during an implementation of the compiled source code by performing an out-of-bounds (OOB) check in hardware…
Hardware-efficient PAM-3 encoder and decoder
Granted: November 5, 2024
Patent Number:
12135607
Data bits are encoded in one or both of an eleven bit seven pulse amplitude modulated three-level (PAM-3) symbol (11b7s) format and a three bit two symbol (3b2s) format on a plurality of data channels and on an error correction channel. One or more of a cyclic redundancy check (CRC) value, a poison value, and a severity value are encoded as 11b7s and/or 3b2s PAM-3 symbols on the error correction channel.
Object fence generation for lane assignment in autonomous machine applications
Granted: October 29, 2024
Patent Number:
12131556
In various examples, object fence corresponding to objects detected by an ego-vehicle may be used to determine overlap of the object fences with lanes on a driving surface. A lane mask may be generated corresponding to the lanes on the driving surface, and the object fences may be compared to the lanes of the lane mask to determine the overlap. Where an object fence is located in more than one lane, a boundary scoring approach may be used to determine a ratio of overlap of the boundary…
Hardware-efficient PAM-3 encoder and decoder
Granted: October 29, 2024
Patent Number:
12132590
Data bits are encoded in one or both of an eleven bit seven pulse amplitude modulated three-level (PAM-3) symbol (11b7s) format and a three bit two symbol (3b2s) format on a plurality of data channels, one or more auxiliary data channels, and an error correction channel. One or more of a cyclic redundancy check (CRC) value, a poison value, and a severity value are encoded as 11b7s and/or 3b2s PAM-3 symbols on an error correction channel.
Physically unclonable cell using dual-interlocking and error correction techniques
Granted: October 29, 2024
Patent Number:
12131800
PUF cells utilizing a dual-interlocking scheme demonstrating improved noise immunity and stability across different V/T conditions and different uses over time in noisy environments. The PUF cell may be advantageously utilized in conjunction with error detection techniques that screen out unstable cells. A set of such PUF cells utilized to generate a device-specific bit pattern, for example a master key.
Keeper-free volatile memory system
Granted: October 29, 2024
Patent Number:
12131775
A static random access memory (SRAM) or other bit-storing cell arrangement includes memory cells and a hierarchical bitline structure including local bitlines for subsets of the memory banks and a global bitline spanning the subsets. A keeper circuit for the global bitline is replaced by bias circuitry on output transistors of the memory cells.
Hardware support for optimizing huge memory page selection
Granted: October 29, 2024
Patent Number:
12130750
Computer systems often employ virtual address translation hierarchies in which virtual memory addresses are mapped to physical memory. Use of the virtual address translation hierarchy speeds up the virtual address translation when the required mapping is stored in one of the higher levels of the hierarchy. To reduce a number of misses occurring in the virtual address translation hierarchy, huge memory pages may be selectively employed, which map larger continuous regions of virtual…
Techniques for controlling computing performance for power-constrained multi-processor computing systems
Granted: October 29, 2024
Patent Number:
12130687
A computer-implemented method of controlling power consumption in a multi-processor computing device comprises: determining whether a first processor is operating in a high-power regime or a low-power regime; selecting a first set of control rules that includes a first subset of control rules that apply when the first processor is operating in the high-power regime and a second subset of control rules that apply when the first processor is operating in the low-power regime; determining…
Leaf spring for an integrated circuit heat sink
Granted: October 29, 2024
Patent Number:
12129901
Various embodiments of the present disclosure relate to a leaf spring for coupling a heat sink to an integrated circuit, where the leaf spring includes a central portion that has an aperture, a first spring arm that is formed on a first side of the central portion and includes a first through-hole for a first fastener, and a second spring arm that is formed on a second side of the central portion and includes a second through-hole for a second fastener. In various embodiments, a first…
Transferring from a cloud-hosted instance of an application to a local instance
Granted: October 22, 2024
Patent Number:
12121801
In various examples, a user may access or acquire an application to download to the user's local computing device. Upon accessing the application, a local instance of the application may begin downloading to the computing device, and the user may be given the option to play a cloud-hosted instance of the application. If the user selects to play a hosted instance of the application, the cloud-hosted instance of the application may begin streaming while the local instance of the…
Staged commissioning for datacenter cooling systems
Granted: October 22, 2024
Patent Number:
12127374
Systems and methods for a datacenter cooling system are disclosed. In at least one embodiment, reconfigurable terminations are provided for fluid loops in a datacenter cooling system with individual ones of such reconfigurable terminations are to be configured in a first state to enable non-cooling fluid runs through individual ones of such fluid loops, taken individually and in combination, during commissioning of a datacenter cooling system, and are to be configured in a second state…
Leveraging low power states for fault testing of processing cores at runtime
Granted: October 22, 2024
Patent Number:
12124346
In various examples, one or more components or regions of a processing unit—such as a processing core, and/or component thereof—may be tested for faults during deployment in the field. To perform testing while in deployment, the state of a component subject to test may be retrieved and/or stored during the test to maintain state integrity, the component may be clamped to communicatively isolate the component from other components of the processing unit, a test vector may be applied…
Techniques to modify processor performance
Granted: October 22, 2024
Patent Number:
12124308
Apparatuses, systems, and techniques to optimize processor performance. In at least one embodiment, a method increases an operation voltage of one or more processors, based at least in part, on one or more error rates of the one or more processors.
Context-based state estimation
Granted: October 22, 2024
Patent Number:
12122392
State information can be determined for a subject that is robust to different inputs or conditions. For drowsiness, facial landmarks can be determined from captured image data and used to determine a set of blink parameters. These parameters can be used, such as with a temporal network, to estimate a state (e.g., drowsiness) of the subject. To improve robustness, an eye state determination network can determine eye state from the image data, without reliance on intermediate landmarks,…
Generating computer simulations of manipulations of materials based on machine learning from measured statistics of observed manipulations
Granted: October 22, 2024
Patent Number:
12122053
Apparatuses, systems, and techniques to identify at least one physical characteristic of materials from computer simulations of manipulations of materials. In at least one embodiment, physical characteristics are determined by comparing measured statistics of observed manipulations to simulations of manipulations using a simulator trained with a likelihood-free inference engine.
Automatic classification and reporting of inappropriate language in online applications
Granted: October 22, 2024
Patent Number:
12121823
In various examples, game session audio data—e.g., representing speech of users participating in the game—may be monitored and/or analyzed to determine whether inappropriate language is being used. Where inappropriate language is identified, the portions of the audio corresponding to the inappropriate language may be edited or modified such that other users do not hear the inappropriate language. As a result, toxic behavior or language within instances of gameplay may be…
