OCZ Technology Patent Applications

NAND FLASH-BASED SOLID STATE DRIVE AND METHOD OF OPERATION

Granted: May 10, 2012
Application Number: 20120117309
A solid state drive that uses over-provisioning of NAND flash memory blocks as part of housekeeping functionality, including deduplication and coalescence of data for efficient usage of NAND flash memory devices and maintaining sufficient numbers of erased blocks to promote write performance.

PCIe BUS EXTENSION SYSTEM, METHOD AND INTERFACES THEREFOR

Granted: February 9, 2012
Application Number: 20120033370
A PCIe bus extension system, method, interface card and cable for connecting a PCIe-compliant peripheral device to a PCIe bus of a computer system. The interface card includes a printed circuit board, an edge connector adapted for insertion into a PCIe expansion slot on a motherboard of the computer system for transmitting PCIe signals between the motherboard and the interface card, an interface port configured to mate with a connector of the cable, and a logic integrated circuit on the…

MEMORY SYSTEM AND METHOD FOR GENERATING AND TRANSFERRING PARITY INFORMATION

Granted: January 12, 2012
Application Number: 20120011424
A memory system and method for generating and transferring parity information within burst transactions of burst read and write transfers and without dedicated parity chips or parity data lines.

MASS STORAGE SYSTEM AND METHOD USING HARD DISK AND SOLID-STATE MEDIA

Granted: December 29, 2011
Application Number: 20110320690
Methods and systems for mass storage of data over two or more tiers of mass storage media that include nonvolatile solid-state memory devices, hard disk devices, and optionally volatile memory devices or nonvolatile MRAM in an SDRAM configuration. The mass storage media interface with a host through one or more PCIe lanes on a single printed circuit board.

LARGE CAPACITY SOLID-STATE STORAGE DEVICES AND METHODS THEREFOR

Granted: November 17, 2011
Application Number: 20110283043
Non-volatile storage devices and methods capable of achieving large capacity solid state drives containing multiple banks of memory devices. The storage devices include a printed circuit board, at least two banks of non-volatile solid-state memory devices, bank switching circuitry, a connector, and a memory controller. The bank switching circuitry is integrated onto the memory controller and functionally interposed between the banks of memory devices and the front end of the memory…

MODULAR MASS STORAGE DEVICES AND METHODS OF USING

Granted: October 20, 2011
Application Number: 20110258355
A modular mass storage device suitable for use with computers and other processing apparatuses. The mass storage device includes a controller board having a system interface connector, a memory controller, a cache device, and a second connector. The mass storage device further includes a daughter board having at least one non-volatile memory device for data storage, a read-only memory device containing firmware of the mass storage device, and a daughter board connector configured to mate…

FLASH MEMORY DEVICE AND METHOD OF OPERATION

Granted: October 20, 2011
Application Number: 20110255337
A NAND flash memory device and method of erasing memory cells thereof, wherein each cell is only subjected to the level of erase voltage needed to restore its nominal “erased” state. Each memory cell of the NAND flash memory device comprises a floating gate, a control gate connected to a wordline and receives a control voltage therefrom to induce a programming charge on the floating gate, and a bitline adapted to apply an erase voltage to deplete the floating gate of the programming…

CENTRAL PROCESSING UNIT AND METHOD FOR WORKLOAD DEPENDENT OPTIMIZATION THEREOF

Granted: September 22, 2011
Application Number: 20110231637
A central processing unit (CPU) adapted for use in a computing system, such as a personal computer or other processing apparatus. The CPU is implemented to perform hyper-threading (HT), and further enables switching between HT-enabled and HT-disabled modes on the fly (without rebooting the apparatus) based on, for example, performance measurements or entries into a local library.

MASS STORAGE DEVICE AND METHOD FOR OFFLINE BACKGROUND SCRUBBING OF SOLID-STATE MEMORY DEVICES

Granted: September 22, 2011
Application Number: 20110231730
A solid-state mass storage device and method for its operation that includes performing preemptive scrubbing of data during offline periods or disconnects from a host system to which the mass storage device is attached. The device includes a system interface adapted to connect the drive to a host system, at least one nonvolatile memory device, controller means through which data pass when being written to and read from the memory device, a volatile memory cache, a system logic device,…

METHODS AND SYSTEMS UTILIZING NONVOLATILE MEMORY IN A COMPUTER SYSTEM MAIN MEMORY

Granted: August 25, 2011
Application Number: 20110208900
Methods and systems capable of capitalizing on fast access capabilities (low initial access latencies) of nonvolatile memory technologies for use in a host system, such as computers and other processing apparatuses. The host system has a central processing unit, processor cache, and a system main memory. The system main memory includes first and second memory slots, a volatile memory subsystem having at least one DRAM-based memory module received in the first memory slot and addressed by…

METHOD AND APPARATUS FOR INCREASING FILE COPY PERFORMANCE ON SOLID STATE MASS STORAGE DEVICES

Granted: July 14, 2011
Application Number: 20110173372
A mass storage device and method that utilize storage memory and a shadow memory capable of increasing the speed associated with copying data from one location to another location within the storage memory without the need to access a host computer for the copy transaction. A controller of the mass storage device receives a file copy request for a file to be copied between first and second locations within the storage memory. Data from the first location within the storage memory is then…

COMPUTER SYSTEM WITH BACKUP FUNCTION AND METHOD THEREFOR

Granted: July 14, 2011
Application Number: 20110173378
A solid-state mass storage device and method of anticipating a failure of the mass storage device resulting from a memory device of the mass storage device reaching a write endurance limit. A procedure is then initiated to back up data to a second mass storage device prior to failure. The method includes assigning at least a first memory block of the memory device as a wear indicator, using other memory blocks of the memory device as data blocks for data storage, performing program/erase…

SOLID-STATE MASS STORAGE DEVICE AND METHOD FOR FAILURE ANTICIPATION

Granted: July 14, 2011
Application Number: 20110173484
A solid-state mass storage device and method of operating the storage device to anticipate the failure of at least one memory device thereof before a write endurance limitation is reached. The method includes assigning at least a first memory block of the memory device as a wear indicator that is excluded from use as data storage, using pages of at least a set of memory blocks of the memory device for data storage, writing data to and erasing data from each memory block of the set in…

RAID STORAGE SYSTEMS HAVING ARRAYS OF SOLID-STATE DRIVES AND METHODS OF OPERATION

Granted: June 9, 2011
Application Number: 20110138113
RAID storage systems and methods adapted to enable the use of NAND flash-based solid-state drives. The RAID storage system includes an array of solid-state drives and a controller operating to combine the solid-state drives into a logical unit. The controller utilizes data striping to form data stripe sets comprising data (stripe) blocks that are written to individual drives of the array, utilizes distributed parity to write parity data of the data stripe sets to individual drives of the…

METHOD FOR RESTORING AND MAINTAINING SOLID-STATE DRIVE PERFORMANCE

Granted: May 19, 2011
Application Number: 20110119462
A method of maintaining a solid-state drive so that free space within memory blocks of the drive becomes free usable space to the drive. The drive comprises cells organized in pages that are organized in memory blocks in which at least user files are stored. A defragmentation utility is executed to cause at least some of the memory blocks that are partially filled with data and contain file fragments to be combined or aligned and to cause at least some of the memory blocks that contain…

MASS STORAGE DEVICE WITH SOLID-STATE MEMORY COMPONENTS CAPABLE OF INCREASED ENDURANCE

Granted: May 12, 2011
Application Number: 20110110158
A mass storage device that utilizes one or more solid-state memory components to store data for a host system, and a method for increasing the write endurance of the memory components. The memory components are periodically heated above an intrinsic operating temperature thereof to a preselected temperature that is sufficient to thermally recondition the memory component in a manner that increases the write endurance of the memory component.

MASS STORAGE DEVICE AND METHOD OF ACCESSING MEMORY DEVICES THEREOF

Granted: May 5, 2011
Application Number: 20110102997
A mass storage device configured to enable accessing of an array of solid-state memory devices on the storage device in the event of a memory controller failure on the storage device. The storage device includes a printed circuit board, an array of non-volatile solid-state memory devices on the printed circuit board, a system interface connector on the printed circuit board and adapted to connect the mass storage device to a host system, and an onboard memory controller on the printed…

COMPUTER SYSTEM AND PROCESSING METHOD UTILIZING GRAPHICS PROCESSING UNIT WITH ECC AND NON-ECC MEMORY SWITCHING CAPABILITY

Granted: April 14, 2011
Application Number: 20110084978
Computer systems and methods that utilize a GPU whose operation is able to switch between ECC and non-ECC memory operations on demand. The computer system includes a graphics processing unit and a memory controller and local memory that are functionally integrated with the graphics processing unit. The memory controller has at least two operating modes comprising a first memory access mode that uses error checking and correction when accessing the local memory, and a second memory access…

HIGH PERFORMANCE SOLID-STATE DRIVES AND METHODS THEREFOR

Granted: March 24, 2011
Application Number: 20110069526
A nonvolatile storage device adapted for use with computers, workstations and other processing apparatuses. The storage device includes a printed circuit board, a nonvolatile memory array comprising at least two sub-arrays that contain nonvolatile solid-state memory devices, and control circuitry for interfacing with the processing apparatus. The control circuitry includes an abstraction layer and at least two memory control units configured to communicate data, address and control…

LARGE CAPACITY SOLID-STATE STORAGE DEVICES AND METHODS THEREFOR

Granted: March 10, 2011
Application Number: 20110060869
Non-volatile storage devices and methods capable of achieving large capacity SSDs containing multiple banks of memory devices. The storage devices include a printed circuit board, at least two banks of non-volatile solid-state memory devices, bank switching circuitry, a connector, and optionally a memory controller. The bank switching circuitry is functionally interposed between the banks of memory devices and either the connector or the memory controller. The bank switching circuitry…