METHOD AND APPARATUS FOR REDUCING NOISE IN ANALOG IMAGE DATA OF A CMOS IMAGE SENSOR
Granted: March 6, 2014
Application Number:
20140063301
A method for preprocessing analog image data to reduce noise in the analog image data that is readout from a pixel array of an image sensor during a sampling time is disclosed. The method includes generating multiple samples of the analog image data during the sampling time and then limiting values of the multiple samples to an upper and lower threshold. The method also includes pre-conditioning the multiple samples by applying a weighting factor to each of the multiple samples in…
SELECTIVE GAIN CONTROL CIRCUIT
Granted: March 6, 2014
Application Number:
20140062599
A circuit for providing signal amplification with reduced fixed pattern noise. In an embodiment, the circuit includes an amplifier and a plurality of legs coupled in parallel with one another between a first node for an input of the amplifier and a second node for an output of the amplifier. Control logic selects a first combination of the plurality of legs for a first configuration of the circuit to provide a first loop gain with the amplifier. In another embodiment, the control logic…
COMPARATOR CIRCUIT FOR REDUCED OUTPUT VARIATION
Granted: March 6, 2014
Application Number:
20140061433
A comparator circuit for generating a signal representing a comparison of an input signal and a reference signal. In an embodiment, the comparator circuit includes a first stage and a second stage to provide respective signal amplification, where switch circuitry of the second stage switchedly couples respective elements of the first and second stages. The comparator circuit further includes a third stage to generate an output signal based on an intermediate signal of the second stage.…
DEVICE AND METHOD FOR REDUCING SPECKLE IN PROJECTED IMAGES
Granted: February 27, 2014
Application Number:
20140055755
An image projector includes a light source for displaying light and a diffusing screen coupled to an in-plane vibrator. The diffusing screen is positioned to receive the display light from the light source and generate phase-modulated display light. The image projector also includes a collimating element positioned to receive the phase-modulated display light. The image projector further includes a display panel positioned to receive the phase-modulated display light after being…
BACKSIDE ILLUMINATED CMOS IMAGE SENSOR
Granted: February 20, 2014
Application Number:
20140048898
A backside illuminated (BSI) CMOS image sensor is disclosed. The BSI CMOS image sensor includes: a substrate having a front side and a back side, the substrate including a photodiode formed therein, the photodiode being proximate the back side of the substrate; a metal shielding layer covering the back side of the substrate, the metal shielding layer including an opening formed therein, the opening being arranged in correspondence with the photodiode; and a light-absorbing layer formed…
PIXEL WITH NEGATIVELY-CHARGED SHALLOW TRENCH ISOLATION (STI) LINER
Granted: February 20, 2014
Application Number:
20140048897
Embodiments of a pixel including a substrate having a front surface and a photosensitive region formed in or near the front surface of the substrate. An isolation trench is formed in the front surface of the substrate adjacent to the photosensitive region. The isolation trench includes a trench having a bottom and sidewalls, a passivation layer formed on the bottom and the sidewalls, and a filler to fill the portion of the trench not filled by the passivation layer.
CAPACITANCE SELECTABLE CHARGE PUMP
Granted: February 20, 2014
Application Number:
20140048686
A step-up converter includes an input coupled to receive a first voltage potential and an output coupled to output a second voltage potential higher than the first voltage potential. The step-up converter also includes an array of capacitance charge pumps. Each of the capacitance charge pumps in the array includes switches to be modulated to individually run each of the capacitance charge pumps by selectively connecting each of the capacitance charge pumps to the input and the output.…
NOISE-MATCHING DYNAMIC BIAS FOR COLUMN RAMP COMPARATORS IN A CMOS IMAGE SENSOR
Granted: February 20, 2014
Application Number:
20140048685
Embodiments of an image sensor including a pixel array with a plurality of pixels arranged into rows and columns. Control circuitry coupled to the pixels in each row, and an analog-to-digital converter is coupled to the pixels in each column of the pixel array. Each analog-to-digital converter includes a ramp comparator, and a variable current source coupled to the ramp comparator to provide a variable bias current to the ramp comparator. The bias current can adjusted during reading of a…
LENS ARRAY FOR PARTITIONED IMAGE SENSOR HAVING COLOR FILTERS
Granted: February 13, 2014
Application Number:
20140043507
An apparatus includes an image sensor including N image sensor regions arranged thereon. N lens structures are included in a lens array disposed proximate to the image sensor. Each one of the N lens structures is arranged to focus a single image onto a respective one of the N image sensor regions. The N lens structures include a first lens structure having a red color filter, a second lens structure having a green color filter, and a third lens structure having a blue color filter. Each…
PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES
Granted: February 6, 2014
Application Number:
20140035089
Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The…
CMOS IMAGE SENSOR SWITCH CIRCUIT FOR REDUCED CHARGE INJECTION
Granted: February 6, 2014
Application Number:
20140034808
A switch circuit including structures to reduce the effects of charge injection. In an embodiment, a first transistor of the switch circuit is to receive a first signal and first and second dummy transistors of the switch circuit are each to receive a second signal, wherein the first transistor is connected between the first and second dummy transistors. The second signal is complementary to the first signal. In another embodiment, the first transistor, the first dummy transistor and the…
Image Processing System And Method Using Multiple Imagers For Providing Extended View
Granted: January 30, 2014
Application Number:
20140028851
A system and method for generating an image includes a plurality of imaging units coupled together and a system controller coupled to the plurality of imaging units for providing at least one signal to each of the plurality of imaging units. Each of the imaging units comprises: an image sensing unit for generating an in-situ image, each in-situ image being a portion of the image; an input for receiving the in-situ image; a composition unit for receiving a first composite image and…
GROUND CONTACT STRUCTURE FOR A LOW DARK CURRENT CMOS PIXEL CELL
Granted: January 30, 2014
Application Number:
20140027827
Pixel array structures to provide a ground contact for a CMOS pixel cell. In an embodiment, an active area of a pixel cell includes a photodiode disposed in a first portion of an active area, where a second portion of the active area extends from a side of the first portion. The second portion includes a doped region to provide a ground contact for the active area. In another embodiment, the pixel cell includes a transistor to transfer the charge from the photodiode, where a gate of the…
INTEGRATED CIRCUIT STACK WITH INTEGRATED ELECTROMAGNETIC INTERFERENCE SHIELDING
Granted: January 16, 2014
Application Number:
20140014813
An integrated circuit system includes a first device wafer having a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer having a second semiconductor layer proximate to a second metal layer including a second conductor is disposed within a second metal layer oxide. A frontside of the first device wafer is bonded to a frontside of the second device wafer at a bonding interface. A conductive…
HYBRID ANALOG-TO-DIGITAL CONVERTER HAVING MULTIPLE ADC MODES
Granted: January 9, 2014
Application Number:
20140008515
A hybrid ADC having a successive approximation register (SAR) ADC mode for generating a bit of a digital signal and a ramp ADC mode for generating an additional bit of the digital signal is disclosed. When in the SAR ADC mode, a control circuit is configured to disable a ramp signal generator; disable a counter; and enable a register to control an offset stage to set the magnitude of an offset voltage that is provided to an input of a comparator of the ADC. When in the ramp ADC mode, the…
IMAGE SENSOR DEVICES AND METHODS FOR MANUFACTURING THE SAME
Granted: January 2, 2014
Application Number:
20140001590
A method for forming an image sensor device is provided. First, a lens is provided and a first sacrificial element is formed thereon. An electromagnetic interference layer is formed on the lens and the first sacrificial element, and the first sacrificial element and electromagnetic interference layer thereon are removed to form an electromagnetic interference pattern having an opening exposing a selected portion of the lens. A second sacrificial element is formed in the opening to cover…
SHUTTER RELEASE USING SECONDARY CAMERA
Granted: December 12, 2013
Application Number:
20130329074
A method of capturing an image includes activating a first image sensor and capturing a sequence of images with a second image sensor. A determination is made as to whether the sequence of images captured by the second image sensor includes a shutter gesture. If a shutter gesture is included in the sequence of images captured by the second image sensor, the first image sensor captures a target image in response.
LENS ARRAY FOR PARTITIONED IMAGE SENSOR
Granted: December 5, 2013
Application Number:
20130320195
An apparatus includes an image sensor having N image sensor regions arranged thereon. A lens array having a including N lens structures is disposed proximate to the image sensor. Each one of the N lens structures is arranged to focus a single image onto a respective one of the N image sensor regions. The N lens structures include a first lens structure having a first focal length and positioned the first focal length away from the respective one of the N image sensor regions. A second…
ENCAPSULATED IMAGE ACQUISITION DEVICES HAVING ON-BOARD DATA STORAGE, AND SYSTEMS, KITS, AND METHODS THEREFOR
Granted: December 5, 2013
Application Number:
20130321604
A method of one aspect may include receiving an encapsulated image acquisition device having an internal memory. The internal memory may store images acquired by the encapsulated image acquisition device. The images may be transferred from the internal memory to an external memory that is external to the encapsulated image acquisition device. An image analysis station may be selected from among a plurality of image analysis stations to analyze the images. The images may be analyzed with…
ENCAPSULATED IMAGE ACQUISITION DEVICES HAVING ON-BOARD DATA STORAGE, AND SYSTEMS, KITS, AND METHODS THEREFOR
Granted: December 5, 2013
Application Number:
20130321603
A method of one aspect may include receiving an encapsulated image acquisition device having an internal memory. The internal memory may store images acquired by the encapsulated image acquisition device. The images may be transferred from the internal memory to an external memory that is external to the encapsulated image acquisition device. An image analysis station may be selected from among a plurality of image analysis stations to analyze the images. The images may be analyzed with…
