ENCAPSULATED IMAGE ACQUISITION DEVICES HAVING ON-BOARD DATA STORAGE, AND SYSTEMS, KITS, AND METHODS THEREFOR
Granted: December 5, 2013
Application Number:
20130321605
A method of one aspect may include receiving an encapsulated image acquisition device having an internal memory. The internal memory may store images acquired by the encapsulated image acquisition device. The images may be transferred from the internal memory to an external memory that is external to the encapsulated image acquisition device. An image analysis station may be selected from among a plurality of image analysis stations to analyze the images. The images may be analyzed with…
METHOD, APPARATUS AND SYSTEM TO PROVIDE VIDEO DATA FOR BUFFERING
Granted: November 21, 2013
Application Number:
20130308057
Techniques and mechanisms for circuitry to provide video data for loading to a buffer. In an embodiment, a loader circuit receives video data and determines MX data for a video frame and NZ data for the video frame, wherein M and N are different respective dimensions of a color space, and wherein X is a first encoding type and Z is a second encoding type. The first MX data includes data representing a first portion of a color component value, and the first NZ data includes data…
BACKSIDE STIMULATED SENSOR WITH BACKGROUND CURRENT MANIPULATION
Granted: November 21, 2013
Application Number:
20130307093
A CMOS (Complementary Metal Oxide Semiconductor) pixel for sensing at least one selected from a biological, chemical, ionic, electrical, mechanical and magnetic stimulus. The CMOS pixel includes a substrate including a backside, a source coupled with the substrate to generate a background current, and a detection element electrically coupled to measure the background current. The stimulus, which is to be provided to the backside, affects a measurable change in the background current.
IMAGE SENSOR WITH SEGMENTED ETCH STOP LAYER
Granted: November 7, 2013
Application Number:
20130292751
An apparatus includes a semiconductor layer having an array of pixels arranged therein. A passivation layer is disposed proximate to the semiconductor layer over the array of pixels. A segmented etch stop layer including a plurality of etch stop layer segments is disposed proximate to the passivation layer over the array of pixels. Boundaries between each one of the plurality of etch stop layer segments are aligned with boundaries between pixels in the array of pixels.
METHOD, APPARATUS AND SYSTEM FOR EXCHANGING VIDEO DATA IN PARALLEL
Granted: October 31, 2013
Application Number:
20130286285
Techniques and mechanisms for exchanging sets of video data each via multiple channels. In an embodiment, a first data set is distributed across the multiple channels according to a first mapping of the multiple channels each to a different respective one of multiple data types, where each of the multiple data types corresponds to a different respective dimension of a color space. In another embodiment, a second data set is distributed across the multiple channels according to a second…
SHARED TERMINAL OF AN IMAGE SENSOR SYSTEM FOR TRANSFERRING IMAGE DATA AND CONTROL SIGNALS
Granted: October 10, 2013
Application Number:
20130264465
An example image sensor system includes an image sensor having a first terminal and a host controller coupled to the first terminal. Logic is included in the image sensor system, that when executed transfers analog image data from the image sensor to the host controller through the first terminal of the image sensor and also transfers one or more digital control signals between the image sensor and the host controller through the same first terminal.
METHOD, APPARATUS AND SYSTEM FOR REDUCING PIXEL CELL NOISE
Granted: October 10, 2013
Application Number:
20130265472
Circuitry to reduce signal noise characteristics in an image sensor. In an embodiment, a bit trace line segment is located between neighboring respective segments of a source follower power trace and an additional trace which is to remain at a first voltage level during a pixel cell readout time period. In another embodiment, for each such trace segment, a smallest separation between the trace segment and the respective neighboring other one of such trace segments is substantially equal…
METHOD AND APPARATUS PROVIDING INTEGRATED CIRCUIT SYSTEM WITH INTERCONNECTED STACKED DEVICE WAFERS
Granted: October 10, 2013
Application Number:
20130264688
An integrated circuit system includes a first device wafer that has a first semiconductor layer proximate to a first metal layer including a first conductor disposed within a first metal layer oxide. A second device wafer that has a second semiconductor layer proximate to a second metal layer including a second conductor disposed within a second metal layer oxide is also included. A frontside of the first metal layer oxide is bonded to a frontside of the second metal layer oxide at an…
DOUBLE-SIDED IMAGE SENSOR
Granted: October 10, 2013
Application Number:
20130264467
An example double-sided image sensor includes a semiconductor die, a photodetector, a charge-to-voltage converter, and support circuitry. The semiconductor die has a first side and a second side that is opposite the first side. The photodetector is disposed within the semiconductor die on the first side for accumulating an image charge in response to light incident on the first side. The charge-to-voltage converter is disposed within the semiconductor die on the first side. The transfer…
SHARED TERMINAL OF AN IMAGE SENSOR SYSTEM FOR TRANSFERRING CLOCK AND CONTROL SIGNALS
Granted: October 10, 2013
Application Number:
20130264466
An example image sensor system includes an image sensor having a first terminal and a host controller coupled to the first terminal. Logic is included in the image sensor system, that when executed transfers clock signals from the host controller to the image sensor through the first terminal of the image sensor and also transfers one or more digital control signals between the image sensor and the host controller through the same first terminal.
WAFER LEVEL CAMERA MODULE WITH PROTECTIVE TUBE
Granted: October 3, 2013
Application Number:
20130258182
An apparatus includes an image sensor module with a lens stack disposed on the image sensor module. A protective tube is disposed on the image sensor module and encloses the lens stack. A metal housing encloses the protective tube. The metal housing includes a housing foot adapted to secure the image sensor module between the housing foot of the metal housing and the protective tube.
WAFER LEVEL CAMERA MODULE WITH SNAP-IN LATCH
Granted: October 3, 2013
Application Number:
20130258181
An apparatus includes an image sensor module with a lens stack disposed on the image sensor module. A protective tube is disposed on the image sensor module and encloses the lens stack. The protective tube includes an outer wall having a snap-in latch element disposed thereon. A metal housing encloses the protective tube. The metal housing includes a housing foot and inner wall having an opposite snap-in latch element disposed thereon. The image sensor module is adapted to be secured…
SYSTEM, APPARATUS AND METHOD FOR DARK CURRENT CORRECTION
Granted: October 3, 2013
Application Number:
20130258144
Embodiments of the invention describe a system, apparatus and method for obtaining black reference pixels for dark current correction processing are described herein. Embodiments of the invention capture image signal data via a plurality of pixel cells of a pixel unit of an image device, wherein capturing image signal data involves establishing a first state of exposing incident light on each pixel of the pixel unit and a second state of shielding incident light from one or more pixels…
METHOD AND DEVICE WITH ENHANCED ION DOPING
Granted: October 3, 2013
Application Number:
20130256822
Techniques for providing a pixel cell which exhibits improved doping in a semiconductor substrate. In an embodiment, a first doping is performed through a backside of the semiconductor substrate. After the first doping, the semiconductor substrate is thinned to expose a front side which is opposite of the backside. In another embodiment, a second doping is performed through the exposed front side of the thinned semiconductor substrate to form at least part of a pixel cell structure.
IMAGING DEVICE WITH FLOATING DIFFUSION SWITCH
Granted: October 3, 2013
Application Number:
20130256510
Embodiments of the invention describe utilizing dual floating diffusion switches to enhance the dynamic range of pixels having multiple photosensitive elements. The insertion of dual floating diffusion switches between floating diffusion nodes of said photosensitive elements allows the conversion gain to be controlled and selected for each photosensitive element of a pixel. Furthermore, in embodiments utilizing a photosensitive element for high conversion gains, the value of high…
DUAL SOURCE FOLLOWER PIXEL CELL ARCHITECTURE
Granted: October 3, 2013
Application Number:
20130256509
Techniques for providing a pixel cell which includes two source follower transistors. In an embodiment, a first source follower transistor of a pixel cell and a second source follower transistor of the pixel cell are coupled in parallel with one another, where the source follower transistors are each coupled via their respective gates to a floating diffusion node of the pixel cell. In another embodiment, the first source follower transistor and second source follower transistor each…
ENTRENCHED TRANSFER GATE
Granted: September 26, 2013
Application Number:
20130248937
An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the…
IMAGE SENSOR HAVING A PULSED MODE OF OPERATION
Granted: September 12, 2013
Application Number:
20130237280
An image sensor includes a pixel array having a plurality of pixels. A readout circuit is coupled to the pixel array. A controller circuit is coupled to control the pixel array and is coupled to the readout circuit to receive array data from the pixel array. The controller circuit includes a mode control logic unit providing logic which when executed causes the image sensor operate in an idle mode of operation and then sample in response to receiving an event signal array data received…
IMAGE SENSOR FOR TWO-DIMENSIONAL AND THREE-DIMENSIONAL IMAGE CAPTURE
Granted: September 12, 2013
Application Number:
20130234029
An apparatus includes a first photodetector array including visible light photodetectors disposed in semiconductor material to detect visible light included in light incident upon the semiconductor material. The apparatus also includes a second photodetector array including time of flight (“TOF”) photodetectors disposed in the semiconductor material to capture TOF data from reflected light reflected from an object included in the light incident upon the semiconductor material. The…
CIRCUIT CONFIGURATION AND METHOD FOR TIME OF FLIGHT SENSOR
Granted: September 5, 2013
Application Number:
20130228691
An apparatus includes a photodiode, a first and second storage transistor, a first and second transfer transistor, and a first and second output transistor. The first transfer transistor selectively transfers a first portion of the image charge from the photodiode to the first storage transistor for storing over multiple accumulation periods. The first output transistor selectively transfers a first sum of the first portion of the image charge to a readout node. The second transfer…
