METHOD, APPARATUS AND SYSTEM FOR PROVIDING IMPROVED FULL WELL CAPACITY IN AN IMAGE SENSOR PIXEL
Granted: May 9, 2013
Application Number:
20130113969
Techniques and mechanisms for improving full well capacity for pixel structures in an image sensor. In an embodiment, a first pixel structure of the image sensor includes an implant region, where a skew of the implant region corresponds to an implant angle, and a second pixel structure of the image sensor includes a transfer gate. In another embodiment, an offset of the implant region of the first pixel structure from the transfer gate of the second pixel structure corresponds to the…
PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES
Granted: May 9, 2013
Application Number:
20130113065
Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The…
TRANSISTOR WITH SELF-ALIGNED CHANNEL WIDTH
Granted: April 25, 2013
Application Number:
20130099296
A device includes a transistor including a source and a drain disposed in a substrate and a gate disposed above the substrate. The gate includes a first longitudinal member disposed above the source and the drain and running substantially parallel to a channel of the transistor. The first longitudinal member is disposed over a first junction isolation area. The gate also includes a second longitudinal member disposed above the source and the drain and running substantially parallel to…
PARTIAL BURIED CHANNEL TRANSFER DEVICE FOR IMAGE SENSORS
Granted: April 18, 2013
Application Number:
20130092982
Embodiments of an image sensor pixel that includes a photosensitive element, a floating diffusion region, and a transfer device. The photosensitive element is disposed in a substrate layer for accumulating an image charge in response to light. The floating diffusion region is dispose in the substrate layer to receive the image charge from the photosensitive element. The transfer device is disposed between the photosensitive element and the floating diffusion region to selectively…
ARITHMETIC COUNTER CIRCUIT, CONFIGURATION AND APPLICATION FOR HIGH PERFORMANCE CMOS IMAGE SENSORS
Granted: April 11, 2013
Application Number:
20130089175
An arithmetic counter circuit for high performance CMOS image sensors includes a plurality of flip-flops of a plurality of counter stages and a plurality of multiplexers of the plurality of counter stages being coupled to the plurality of flip-flops. Each of the plurality of multiplexers coupled to receive control signals including at least one of a toggle signal, a keep signal, a shift enable signal, or a mode signal. The control signals select the output of each of the plurality of…
HIGH DYNAMIC RANGE SUB-SAMPLING ARCHITECTURE
Granted: April 11, 2013
Application Number:
20130088624
A method of implementing high dynamic range bin algorithm in an image sensor including a pixel array with a first super row having a first integration time and a second super row having a second integration time is described. The method starts by reading out image data from the first super row into a counter. Image data from the first super row is multiplied by a factor to obtain multiplied data. The factor is a ratio between the first and the second integration times. The multiplied…
MULTIPLE-ROW CONCURRENT READOUT SCHEME FOR HIGH-SPEED CMOS IMAGE SENSOR WITH BACKSIDE ILLUMINATION
Granted: April 11, 2013
Application Number:
20130087683
A system, method and apparatus implementing a multiple-row concurrent readout scheme for high-speed CMOS image sensor with backside illumination are described herein. In one embodiment, the method of operating an image sensor starts acquiring image data within a color pixel array and the image data from a first set of multiple rows in the color pixel array is then concurrently readout. Concurrently reading out the image data from the first set of multiple rows includes concurrently…
IMAGE SENSOR WITH DUAL ELEMENT COLOR FILTER ARRAY AND THREE CHANNEL COLOR OUTPUT
Granted: April 4, 2013
Application Number:
20130083223
A color image sensor includes a pixel array including CFA overlaying an array of photo-sensors for acquiring color image data. The CFA includes first color filter elements of a first color overlaying a first group of the photo-sensors and second color filter elements of a second color overlaying a second group of the photo-sensors. The first group of photo-sensors generate first color signals of a first color channel and the second group of photo-sensors generate second color signals of…
EMI SHIELD FOR CAMERA MODULE
Granted: April 4, 2013
Application Number:
20130083229
Embodiments of the invention describe an electro-magnetic interference (EMI) shield cover disposed over a wafer level camera module. Said camera module includes substrate having a plurality of imaging pixels, an imaging lens unit disposed on a top side the substrate and a plurality of conductive connectors disposed a bottom side of the substrate, wherein at least one of the conductive connectors comprises a ground connector. The substrate further includes a thru-silicon via (TSV)…
IMAGE SENSOR WITH DUAL ELEMENT COLOR FILTER ARRAY AND THREE CHANNEL COLOR OUTPUT
Granted: April 4, 2013
Application Number:
20130083224
A color image sensor includes a pixel array including a CFA overlaying an array of photo-sensors for acquiring a color image. The CFA includes first color filter elements of a first color overlaying a first group of the photo-sensors, second color filter elements of a second color overlaying a second group of the photo-sensors, and a plurality of filter stacks overlaying a third group of the photo-sensors. The first group generates first color signals of a first color channel and the…
CMOS IMAGE SENSOR WITH RESET SHIELD LINE
Granted: April 4, 2013
Application Number:
20130082313
Techniques and mechanisms to improve potential well characteristics in a pixel cell. In an embodiment, a coupling portion of a pixel cell couples a reset transistor of the pixel cell to a floating diffusion node of the pixel cell, the reset transistor to reset a voltage of the floating diffusion node. In another embodiment, the pixel cell includes a shield line which extends athwart the coupling portion, where the shield line is to reduce a parasitic capacitance of the reset transistor…
IMAGE SENSOR WITH MICRO-LENS COATING
Granted: April 4, 2013
Application Number:
20130082163
Techniques and architectures for providing a coating for one or more micro-lenses of a pixel array. In an embodiment, a pixel element includes a micro-lens and a coating portion extending over a surface of the micro-lens, where a profile of the coating portion is super-conformal to, or at least conformal to, a profile of the micro-lens. In another embodiment, the coating portion is formed at least in part by orienting the surface of the micro-lens to face generally downward with the…
DUAL-FACING CAMERA ASSEMBLY
Granted: March 21, 2013
Application Number:
20130069188
Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate). In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions).…
DUAL-SIDED IMAGE SENSOR
Granted: March 14, 2013
Application Number:
20130063641
An apparatus for a dual-sided image sensor is described. The dual-sided image sensor captures frontside image data incident upon a frontside of the dual-sided image sensor within an array of photosensitive regions integrated into a semiconductor layer of the dual-sided image sensor. Backside image data incident upon a backside of the dual-sided image sensor is also captured within the same array of photosensitive regions.
MULTILEVEL RESET VOLTAGE FOR MULTI-CONVERSION GAIN IMAGE SENSOR
Granted: February 28, 2013
Application Number:
20130048831
A method of operating an image sensor includes adjusting a capacitance coupled to a circuit node within a pixel cell. The circuit node is coupled to selectively receive an image charge acquired by a photo-sensor of the pixel cell. A conversion gain is selected from multiple conversion gains for the pixel cell by adjusting the capacitance. A voltage level from multiple voltage levels is selected for use as a reset signal when the reset signal is asserted. The reset signal controls…
IMAGE SENSOR WITH IMPROVED BLACK LEVEL CALIBRATION
Granted: February 7, 2013
Application Number:
20130033629
An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging…
COLOR FILTER PATTERNING USING HARD MASK
Granted: February 7, 2013
Application Number:
20130033627
Embodiments are disclosed of an apparatus comprising a color filter arrangement including a set of color filters. The set of color filters includes a pair of first color filters, each having first and second hard mask layers formed thereon, a second color filter having the first hard mask layer formed thereon, and a third color filter having no hard mask layer formed thereon. Other embodiments are disclosed and claimed.
BACKSIDE ILLUMINATED IMAGE SENSOR WITH STRESSED FILM
Granted: February 7, 2013
Application Number:
20130032921
An image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident through a first side of the image sensor to collect an image charge. The stress adjusting layer is disposed over the first side of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.
PROCESSING COLOR AND PANCHROMATIC PIXELS
Granted: January 17, 2013
Application Number:
20130016250
A method for forming a final digital color image includes capturing an image using an image sensor having panchromatic pixels and color pixels corresponding to at least two color photoresponses; providing from the captured image a digital panchromatic image and an intermediate digital color image; and using the digital panchromatic image and the intermediate digital color image to provide the final digital color image.
IMAGE SENSOR HAVING SUPPLEMENTAL CAPACITIVE COUPLING NODE
Granted: January 10, 2013
Application Number:
20130009043
An image sensor includes a pixel array, a bit line, a supplemental capacitance node line, and a control circuit. The pixel array includes a plurality of pixel cells each including a floating diffusion (“FD”) node and a photosensitive element coupled to selectively transfer image charge to the FD node. The bit line is coupled to selectively conduct image data output from a first group of the pixel cells. The supplemental capacitance node line is coupled to the FD node of a second…
