Self-aligned photodiode for CMOS image sensor and method of making
Granted: March 29, 2007
Application Number:
20070072325
A method for forming a photodiode that is self-aligned to a transfer gate while being compatible with a metal silicide process is disclosed. The method comprises forming a gate stack of gate oxide, polysilicon, and a sacrificial/disposable cap insulator over the polysilicon. The insulator may be a combination of silicon oxynitride and silicon dioxide. After formation of the photodiode, the cap insulator layer is removed.
Method and apparatus for reducing optical crosstalk in CMOS image sensors
Granted: March 8, 2007
Application Number:
20070052035
An image sensor in which the metal interconnects are coated with an anti-reflective coating is disclosed. The top, bottom and sides of the metal interconnects may be coated to reduce reflection from all directions. The thickness of the coating is chosen to suppress reflection of light of certain wavelengths incident at certain expected angles. In particular, the thickness of the coating may be chosen to reduce reflections from neighboring pixels. The metal may be coated in multiple…
Coated wafer level camera modules and associated methods
Granted: March 8, 2007
Application Number:
20070052827
Coated wafer level camera modules and associated methods are disclosed. One aspect of the invention is directed toward a wafer level camera module that includes a die having multiple image sensor integrated circuits. The module can further include a coating covering at least a portion of the die. The coating can be configured to provide at least a partial shield against selected types of electromagnetic energy. The module can still further include multiple contacts positioned to…
Optimized image sensor process and structure to improve blooming
Granted: January 25, 2007
Application Number:
20070018264
An image sensor that has a pixel array using an isolation structure between pixels that reduce electrical cross-talk is disclosed. The pixel array is formed on a substrate that has a thin (less than 5 microns) epitaxial layer. The isolation structure uses a deep p-well to surround a shallow trench isolation. The deep p-well is formed using an implant energy of typically over 700 keV.
Method for making image sensor with reduced etching damage
Granted: January 18, 2007
Application Number:
20070012962
A method of forming a pixel of an image sensor with reduced etching damage is disclosed. The method first includes forming a light sensitive element in a substrate. Then, a transfer gate is formed atop the substrate and adjacent to the light sensitive element. A protective layer, such as an anti-reflective coating, is then formed over the light sensitive element. A blanket oxide layer is formed over the protective layer and the transfer gate. Finally, the oxide layer is etched back to…
Image sensor and pixel having an optimized floating diffusion
Granted: December 21, 2006
Application Number:
20060286708
An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively operative to transfer a signal from the photosensitive element to the floating diffusion. The floating diffusion is formed from an n-type implant with a dosage in the range of 5e13 to 5e14 ions/cm2 Finally, an amplification transistor is controlled by the floating diffusion.
Multi-matrix depth of field image sensor
Granted: November 30, 2006
Application Number:
20060269150
A technique for imaging involves wavefront coded optics and multiple filters. In a non-limiting embodiment, a system developed according to the technique includes wavefront coded optics and a multi-filter image processor. In alternative embodiments, imaging optics may come before wavefront coded optics or vice versa. In another non-limiting embodiment, a method according to the technique includes selecting a focus distance, wavefront encoding light reflected from or emitted by an object,…
Selective smile formation under transfer gate in a CMOS image sensor pixel
Granted: October 26, 2006
Application Number:
20060240601
A pixel includes a photodiode and a transfer transistor. The transfer transistor is formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. The transfer transistor has a bird's beak structure formed at the interface of its transfer gate and said floating node. Also included is a reset transistor for resetting the floating node to a voltage reference and an amplification transistor controlled by the…
CMOS image sensor using shared transistors between pixels having mirror symmetry
Granted: September 21, 2006
Application Number:
20060208163
A CMOS image sensor that has reduced transistor count is disclosed. The individual pixels are formed by a photodiode and a transfer transistor. An output node receives the signal from the photodiode via the transfer transistor. The output node is shared between multiple pixels. Further, a reset transistor is coupled between a selectable low voltage rail Vss or a high voltage reference Vref and the output node. The gate of an output transistor is then coupled to the output node. Both the…
Mechanical shutter devices for image sensor
Granted: August 17, 2006
Application Number:
20060181635
Mechanical shutter devices for image sensors and associated methods are disclosed. In one aspect of the invention, an imaging system includes an image sensor having an array of pixels with photosensitive elements. The imaging system can further include a signal processing device coupled to the image sensor to receive signals from the image sensor. The system can still further include a shutter device having an open and a closed position. The shutter device can be located proximate to the…
Salicide process using CMP for image sensor
Granted: August 17, 2006
Application Number:
20060183323
A self-aligned silicide (salicide) process is used to form a silicide for a CMOS image sensor consistent with a conventional CMOS image sensor process flow. An insulator layer is deposited over the pixel array of the image sensor. An organic layer is deposited over the insulator layer. A chemical mechanical polish (CMP) is performed to remove the organic over raised polysilicon structures. Using the organic layer as a mask, portions of the insulator layer are removed and a metal layer is…
Salicide process for image sensor
Granted: August 17, 2006
Application Number:
20060183268
A self-aligned silicide (salicide) process is used to form a metal salicide for a CMOS image sensor consistent with a conventional CMOS image sensor process flow. An insulator layer is deposited over the pixel array of the image sensor. Portions of the insulator layer are removed using a photoresist mask and a metal layer is deposited. The photoresist mask protects the photosensitive regions of the image sensor. The metal layer is annealed to form a metal silicide.
Image sensor using deep trench isolation
Granted: August 17, 2006
Application Number:
20060180885
An image sensor that has a pixel array formed on a semiconductor substrate is disclosed. The pixel array may also be formed on an epitaxial layer formed on the said semiconductor substrate. A plurality of pixels are arranged in a pattern and formed on the epitaxial layer or directly on the semiconductor substrate. Further, a deep trench isolation formed in the semiconductor substrate, and used to separate adjacent pixels of the plurality of pixels. The deep trench isolation extends…
Automatic focus for image sensors
Granted: July 27, 2006
Application Number:
20060164934
The embodiments of the invention relate to automatic focusing methods and apparatus suitable for use in digital imaging devices. The proposed methods and apparatus evaluate the focus condition of the optical system by evaluating the digitized image, without requiring additional hardware besides the digital image-capture signal flow path. A method for computing the appropriate direction and magnitude of optical system adjustment, based on the evaluated focus condition, is provided. The…
Low voltage active CMOS pixel on an N-type substrate with complete reset
Granted: July 20, 2006
Application Number:
20060157645
A pixel sensor cell used in a CMOS image sensor is disclosed. The cell includes a pinned photodiode formed in a Pwell that is formed in an N-type semiconductor substrate. A transfer transistor is placed between the pinned photodiode and an output node. A reset transistor is coupled between a high voltage rail Vdd and the output node. Finally, an output transistor with its gate coupled to the output node is provided.
Multilayered semiconductor susbtrate and image sensor formed thereon for improved infrared response
Granted: July 20, 2006
Application Number:
20060157806
An image sensor is formed on a multilayered substrate to improve infrared response. The multilayered substrate uses a silicon-germanium alloy to improve infrared response. In one embodiment, the silicon-germanium alloy has a germanium concentration gradient such that an upper portion of the silicon-germanium alloy has a lower germanium concentration than a lower portion of said silicon-germanium alloy.
Deuterium alloy process for image sensors
Granted: July 6, 2006
Application Number:
20060148120
A method of alloying an image sensor is disclosed. The method comprises forming various semiconductor devices in a semiconductor substrate. Then, an insulator layer is formed over the semiconductor devices. Finally, deuterium gas is used to alloy said image sensor after the insulator oxide layer has been formed and prior to formation of contact holes in the insulator oxide layer.
Image sensor pixel having a transfer gate formed from P+ or N+ doped polysilicon
Granted: June 22, 2006
Application Number:
20060131592
An active pixel using a transfer gate that has a polysilicon gate doped with P+ is disclosed. The pixel includes a photosensitive element formed in a semiconductor substrate and an n-type floating node formed in the semiconductor substrate. An n-channel transfer transistor having a transfer gate is formed between the floating node and the photosensitive element. The transfer gate is doped with a p-type dopant.
Local interconnect structure and method for a CMOS image sensor
Granted: June 15, 2006
Application Number:
20060125007
A self-aligned silicide (salicide) process is used to form a local interconnect for a CMOS image sensor consistent with a conventional CMOS image sensor process flow. An oxide layer is deposited over the pixel array of the image sensor. Portions of the oxide layer is removed and a metal layer is deposited. The metal layer is annealed to form a metal silicide. Optionally, a protective oxide layer is then deposited.
Digital camera for producing positive images from negatives
Granted: June 15, 2006
Application Number:
20060126123
The embodiments of the invention relate generally to digital cameras, such as still or video cameras, and more particularly relate to digital camera systems for positive image reproduction from negative films or images. It eliminates the need for conventional scanners by allowing a digital camera operator to also make positive images from negatives. In various embodiments of the invention, either the user sets up the camera for acquisition of a negative image, or the camera automatically…
