Low power current integration DAC ramp settling assist circuit
Granted: March 11, 2025
Patent Number:
12250485
A ramp generator includes an operational amplifier having an output to generate a ramp signal. An integration current source is coupled to a first input and a reference voltage is coupled to a second input of the operational amplifier. A feedback capacitor and a reset switch are coupled between the first input and the output of the operational amplifier. The reset switch is turned on to reset the ramp generator. A ramp event is configured to be generated in the ramp signal at the output…
Dual gain column structure for column power area efficiency
Granted: March 11, 2025
Patent Number:
12249999
A pixel cell readout circuit comprises a ramp generator having a ramp generator output. A first gain network is coupled to the ramp generator output and configured to provide a first variable comparator gain. A second gain network is coupled to the ramp generator output and configured to provide a second variable comparator gain. A first comparator has a first input coupled to the first gain network. The first comparator further has a second input selectively coupled to a first bitline…
Single bitline SRAM pixel and method for driving the same
Granted: March 11, 2025
Patent Number:
12249299
A novel bit storage circuit includes a first voltage supply line, a second voltage supply line, a bit line, a latch, a first switching transistor, and a blocking transistor. The latch includes an input and an output. The first switching transistor includes a first terminal, a second terminal, and a control terminal. The first switching transistor is operative to provide a conductive path and a non-conductive path between the bit line and the input of the latch responsive to a first…
Low power single photon avalanche diode photon counter with peak current suppression technique
Granted: March 11, 2025
Patent Number:
12247873
A method of counting photons using a plurality of single photon avalanche diodes (SPADs), including initiating a detection phase, enabling each single photon avalanche diode (SPAD) of the plurality of SPADs for a period of time within the detection phase, accumulating a SPAD event from each SPAD of the plurality of SPADs, wherein each SPAD event corresponds to a detection of a single photon, determining a counter code at an end of the detection phase, where the counter code corresponds…
Fisheye image transformation algorithm based on virtual spheres
Granted: March 4, 2025
Patent Number:
12243183
A fisheye image transformation algorithm based on virtual spheres is provided, comprising: defining a real camera coordinate system O-XYZ and a virtual camera coordinate system O2-X2Y2Z2, wherein a small virtual sphere centered at O with a radius of 1 and a large virtual sphere centered at O2 with a radius of n are defined, the small sphere is internally tangent to the large sphere; transforming a fisheye image to 3D unit vectors in the real camera coordinate system, transforming the 3D…
Camera having video stream indicator
Granted: February 25, 2025
Patent Number:
12238415
An image sensor comprises: a control block generating a video interface enabled signal, a video interface for receiving the video interface enabled signal, a pixel array for providing a video stream to the video interface, an output port for receiving the video stream from the video interface and outputting the video stream to outside of the image sensor, a stream indicator pin for receiving the video interface enabled signal from the control block when the video interface is receiving…
Dynamic current control for column ADC
Granted: January 14, 2025
Patent Number:
12199632
A tail current source of a comparator includes a first transistor and a second transistor configured to operate as current sources, wherein the first and second transistors are coupled between a tail node of the comparator and a voltage node, and wherein the tail comprises a node coupled to first and second inputs of the comparator. The tail current source also includes a switch configured to selectively couple the second transistor between the tail and the voltage node, and a bias…
Multiple read image sensors, and associated methods for the same
Granted: January 14, 2025
Patent Number:
12200390
Multiple read image sensors, and associated methods for the same, are disclosed herein. In one embodiment, a method comprises reading out a reset level from a pixel to a corresponding sample and hold circuit; storing the reset level to a first storage device and to a second storage device of the sample and hold circuit; reading out a signal level from the pixel to the sample and hold circuit; and storing the signal level to a third storage device and to a fourth storage device of the…
Adaptive correlated multiple sampling
Granted: January 14, 2025
Patent Number:
12200389
A readout circuit includes a comparator having a first input coupled to receive a ramp signal from a ramp generator and a second input coupled to receive an analog image data signal from one of a plurality of bitlines. The comparator is configured to generate a comparator output in response to a comparison of the ramp signal and the analog image data signal. A sampling circuit has a first input coupled to receive a sampling control signal and a second input coupled to receive the…
Real GS and OFG timing design for 1-by-2 shared HDR VDGS
Granted: January 14, 2025
Patent Number:
12200388
An imaging system includes a pixel array with odd and even pixel cells. Each of the odd and even pixel cells includes a photodiode, a floating diffusion, a transfer transistor, a reset transistor, a lateral overflow integration capacitor (LOFIC), and an overflow gate (OFG) transistor. The imaging system further includes a readout circuit with a sample and hold (SH) circuit and an analog to digital converter. The OFG transistor of each of the odd and even pixel cells is configured to…
Sensor watermarking on raw images
Granted: January 7, 2025
Patent Number:
12189727
A method and apparatus for embedding a digital watermark in image content that is not visible to the human eye is performed on single-sensor digital camera images (often called ‘raw’ images) from a pixel-array. The raw image is transformed to generate preprocessed image coefficients, a watermark message is encrypted using a first key; the encrypted watermark message is randomized using a second key to form a watermark; and the watermark is embedded in randomly selected preprocessed…
Pixel circuit for high dynamic range image sensor
Granted: December 31, 2024
Patent Number:
12185000
A pixel circuit includes a first photodiode and a second photodiode. The first and second photodiodes photogenerate charge in response to incident light. A first transfer transistor is coupled to the first photodiode. A first floating diffusion is coupled to the first transfer transistor. A second transfer transistor is coupled to the second photodiode. A second floating diffusion is coupled to the second transfer transistor. A dual floating diffusion transistor is coupled between the…
Methods for transmitting asynchronous event data via synchronous communications interfaces, and associated imaging systems
Granted: December 31, 2024
Patent Number:
12184973
Methods for transmitting asynchronous event data via synchronous communications interfaces (and associated imaging systems) are disclosed herein. In one embodiment, an imager comprises an array of event vision pixels, a synchronous communications transmitter configured to transmit frames of data to a synchronous communications receiver, and a timer configured to indicate when a threshold amount of time has elapsed. The pixels can generate event data based on activity within an external…
Color-infrared sensor with a low power binning readout mode
Granted: December 31, 2024
Patent Number:
12184956
An imaging device includes a pixel array including a 4×4 grouping of pixel circuits. The 4×4 grouping of pixel circuits includes four rows and four columns of the pixel array. A plurality of bitlines includes a first bitline, a second bitline, a third bitline, and a fourth bitline. Each one of the first, second, third, and fourth bitlines is coupled to a respective four pixel circuits in the 4×4 grouping of pixel circuits. Each one of the first, second, third, and fourth bitlines is…
High K metal-insulator-metal (MIM) capacitor network for lag mitigation
Granted: December 24, 2024
Patent Number:
12177589
A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A plurality of…
Passivation-enhanced image sensor and surface-passivation method
Granted: December 24, 2024
Patent Number:
12176364
An image sensor includes a semiconductor substrate and a multilayer film. The semiconductor substrate includes a photodiode and a back surface having a recessed region that surrounds the photodiode. The multilayer film is on, and conformal to, the recessed region, and includes N layer-groups of adjacent high-? material layers. Each pair of adjacent high-? material layers of a same layer-group of the N layer-groups includes (i) an outer-layer having an outer fixed-charge density and (ii)…
Sample and hold readout system and method for ramp analog to digital conversion
Granted: November 26, 2024
Patent Number:
12155952
A sample and hold readout system and method for ramp analog to digital conversion is presented in which an optical array is read out using a sample and hold circuit such that each sample is used to charge a sample and hold capacitor and is read out during a hold phase using an amplifier that drives an ramp analog to digital converter. The sample and hold circuit transitions to a tracking phase wherein the optical array input drives an amplifier that drives the sample and hold capacitor…
Uniform threshold voltage non-planar transistors
Granted: November 26, 2024
Patent Number:
12154919
Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.
Imaging system with selective readout for visible-infrared image capture
Granted: November 12, 2024
Patent Number:
12142625
An imaging system including a sensor wafer and a logic wafer. The sensor wafer includes a plurality of pixels arranged in rows and columns, the plurality of pixels arranged in rows and columns and including at least a first pixel and a second pixel positioned in a first row included in the rows. The sensor wafer includes a first transfer control line associated with the first row, the first transfer control line coupled to both a first transfer gate of the first pixel and a second…
Optimized pixel design for mitigating MIM image lag
Granted: November 5, 2024
Patent Number:
12137296
A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a pixel voltage source and the floating diffusion. A lateral overflow integration capacitor (LOFIC) network includes a first LOFIC coupled between the floating diffusion and the first…
