Omnivision Technologies Patent Grants

Multiple read image sensors, and associated methods for the same

Granted: January 14, 2025
Patent Number: 12200390
Multiple read image sensors, and associated methods for the same, are disclosed herein. In one embodiment, a method comprises reading out a reset level from a pixel to a corresponding sample and hold circuit; storing the reset level to a first storage device and to a second storage device of the sample and hold circuit; reading out a signal level from the pixel to the sample and hold circuit; and storing the signal level to a third storage device and to a fourth storage device of the…

Adaptive correlated multiple sampling

Granted: January 14, 2025
Patent Number: 12200389
A readout circuit includes a comparator having a first input coupled to receive a ramp signal from a ramp generator and a second input coupled to receive an analog image data signal from one of a plurality of bitlines. The comparator is configured to generate a comparator output in response to a comparison of the ramp signal and the analog image data signal. A sampling circuit has a first input coupled to receive a sampling control signal and a second input coupled to receive the…

Real GS and OFG timing design for 1-by-2 shared HDR VDGS

Granted: January 14, 2025
Patent Number: 12200388
An imaging system includes a pixel array with odd and even pixel cells. Each of the odd and even pixel cells includes a photodiode, a floating diffusion, a transfer transistor, a reset transistor, a lateral overflow integration capacitor (LOFIC), and an overflow gate (OFG) transistor. The imaging system further includes a readout circuit with a sample and hold (SH) circuit and an analog to digital converter. The OFG transistor of each of the odd and even pixel cells is configured to…

Dynamic current control for column ADC

Granted: January 14, 2025
Patent Number: 12199632
A tail current source of a comparator includes a first transistor and a second transistor configured to operate as current sources, wherein the first and second transistors are coupled between a tail node of the comparator and a voltage node, and wherein the tail comprises a node coupled to first and second inputs of the comparator. The tail current source also includes a switch configured to selectively couple the second transistor between the tail and the voltage node, and a bias…

Sensor watermarking on raw images

Granted: January 7, 2025
Patent Number: 12189727
A method and apparatus for embedding a digital watermark in image content that is not visible to the human eye is performed on single-sensor digital camera images (often called ‘raw’ images) from a pixel-array. The raw image is transformed to generate preprocessed image coefficients, a watermark message is encrypted using a first key; the encrypted watermark message is randomized using a second key to form a watermark; and the watermark is embedded in randomly selected preprocessed…

Pixel circuit for high dynamic range image sensor

Granted: December 31, 2024
Patent Number: 12185000
A pixel circuit includes a first photodiode and a second photodiode. The first and second photodiodes photogenerate charge in response to incident light. A first transfer transistor is coupled to the first photodiode. A first floating diffusion is coupled to the first transfer transistor. A second transfer transistor is coupled to the second photodiode. A second floating diffusion is coupled to the second transfer transistor. A dual floating diffusion transistor is coupled between the…

Methods for transmitting asynchronous event data via synchronous communications interfaces, and associated imaging systems

Granted: December 31, 2024
Patent Number: 12184973
Methods for transmitting asynchronous event data via synchronous communications interfaces (and associated imaging systems) are disclosed herein. In one embodiment, an imager comprises an array of event vision pixels, a synchronous communications transmitter configured to transmit frames of data to a synchronous communications receiver, and a timer configured to indicate when a threshold amount of time has elapsed. The pixels can generate event data based on activity within an external…

Color-infrared sensor with a low power binning readout mode

Granted: December 31, 2024
Patent Number: 12184956
An imaging device includes a pixel array including a 4×4 grouping of pixel circuits. The 4×4 grouping of pixel circuits includes four rows and four columns of the pixel array. A plurality of bitlines includes a first bitline, a second bitline, a third bitline, and a fourth bitline. Each one of the first, second, third, and fourth bitlines is coupled to a respective four pixel circuits in the 4×4 grouping of pixel circuits. Each one of the first, second, third, and fourth bitlines is…

Passivation-enhanced image sensor and surface-passivation method

Granted: December 24, 2024
Patent Number: 12176364
An image sensor includes a semiconductor substrate and a multilayer film. The semiconductor substrate includes a photodiode and a back surface having a recessed region that surrounds the photodiode. The multilayer film is on, and conformal to, the recessed region, and includes N layer-groups of adjacent high-? material layers. Each pair of adjacent high-? material layers of a same layer-group of the N layer-groups includes (i) an outer-layer having an outer fixed-charge density and (ii)…

High K metal-insulator-metal (MIM) capacitor network for lag mitigation

Granted: December 24, 2024
Patent Number: 12177589
A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A plurality of…

Sample and hold readout system and method for ramp analog to digital conversion

Granted: November 26, 2024
Patent Number: 12155952
A sample and hold readout system and method for ramp analog to digital conversion is presented in which an optical array is read out using a sample and hold circuit such that each sample is used to charge a sample and hold capacitor and is read out during a hold phase using an amplifier that drives an ramp analog to digital converter. The sample and hold circuit transitions to a tracking phase wherein the optical array input drives an amplifier that drives the sample and hold capacitor…

Uniform threshold voltage non-planar transistors

Granted: November 26, 2024
Patent Number: 12154919
Transistors having nonplanar electron channels in the channel width plane have one or more features that cause the different parts of the nonplanar electron channel to turn on at substantially the same threshold voltage. Advantageously, such transistors have substantially uniform threshold voltage across the nonplanar electron channel. Devices, image sensors, and pixels incorporating such transistors are also provided, in addition to methods of manufacturing the same.

Imaging system with selective readout for visible-infrared image capture

Granted: November 12, 2024
Patent Number: 12142625
An imaging system including a sensor wafer and a logic wafer. The sensor wafer includes a plurality of pixels arranged in rows and columns, the plurality of pixels arranged in rows and columns and including at least a first pixel and a second pixel positioned in a first row included in the rows. The sensor wafer includes a first transfer control line associated with the first row, the first transfer control line coupled to both a first transfer gate of the first pixel and a second…

Optimized pixel design for mitigating MIM image lag

Granted: November 5, 2024
Patent Number: 12137296
A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a pixel voltage source and the floating diffusion. A lateral overflow integration capacitor (LOFIC) network includes a first LOFIC coupled between the floating diffusion and the first…

Flare-blocking image sensor

Granted: November 5, 2024
Patent Number: 12136637
A flare-blocking image sensor includes large pixels and small pixels, a microlens, and an opaque element. The large pixels and small pixels form a first and second pixel array respectively, each having a pixel pitch Px and Py. The second pixel array is offset from the first pixel array by ½Px and ½Py. A first large pixel of the large pixels is between and collinear with a first and a second small pixel separated by ?{square root over (Px2+Py2)} in a first direction and each having a…

Color CMOS image sensor with diffractive microlenses over subpixel photodiode arrays adapted for autofocus

Granted: October 15, 2024
Patent Number: 12120426
An image sensor has diffractive microlenses over pixels with central structures and ring(s) of material having index of refraction different from that of background material. Disposed beneath the diffractive microlenses are photodiodes that permit determining ratios of illumination of peripheral photodiodes to illumination of central photodiodes of the pixels, and, in embodiments, circuitry for determining said ratio. In embodiments, the ratio is used to find illumination wavelengths;…

Dual gain column structure for column power area efficiency

Granted: October 8, 2024
Patent Number: 12114092
A pixel cell readout circuit comprises a comparator with a current mirror having first and second current paths, a first input transistor coupled to the first current path, a low conversion gain (LCG) second input transistor selectively coupled to the second current path, and a high conversion gain (HCG) second input transistor selectively coupled to the second current path. The pixel cell readout circuit further comprises a gain network coupled between a gate node of the first input…

Dark-current inhibiting image sensor and method

Granted: October 1, 2024
Patent Number: 12107107
A dark-current-inhibiting image sensor includes a semiconductor substrate, a thin and a thin junction. The semiconductor substrate includes a front surface, a back surface opposite the front surface, a photodiode, and a concave surface between the front surface and the back surface. The concave surface extends from the back surface toward the front surface, and defines a trench that surrounds the photodiode in a cross-sectional plane parallel to the back surface. The thin junction…

Thin, multi-lens, optical fingerprint sensor adapted to image through cell phone displays and with multiple photodiode groups each having separate fields of view for each microlens

Granted: October 1, 2024
Patent Number: 12106599
An image sensor for imaging fingerprints has multiple photodiode groups each with field of view through a microlens determined by optical characteristics of the microlens and locations of the microlens and openings of upper and lower mask layers. Many photodiode groups have fields of view outwardly splayed from a center-direct field of view. A diameter of openings of the upper mask layer distant from the group having a center-direct field of view is larger than openings of a photodiode…

LOFIC circuit for in pixel metal-insulator-metal(MIM) capacitor lag correction and associated correction methods

Granted: September 17, 2024
Patent Number: 12096141
A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A lateral overflow…