Offset drive scheme for digital display
Granted: September 17, 2024
Patent Number:
12094387
A novel method for driving a digital display having a plurality of pixel rows includes receiving a frame of data to be written to the display in a predetermined frame time, dividing the frame time into a plurality of time intervals, defining a plurality of row groups, and defining a unique sequence for each row group to display corresponding multi-bit data words and a number of off states on the pixels of the rows of the row groups. The drive sequence of each row is offset with respect…
Bitline settling and power supply rejection ratio in a nine cell pixel image sensor with phase detection autofocus
Granted: September 10, 2024
Patent Number:
12088937
An imaging device includes a pixel array of pixel circuits arranged in rows and columns. Bitlines are coupled to the pixel circuits. Clamp circuits are coupled to the bitlines. Each of the clamp circuits includes a clamp short transistor to a power line and a respective one of the bitlines. The clamp short transistor is configured to be switched in response to a clamp short enable signal. A first diode drop device is coupled to the power line. A clamp idle transistor is coupled to the…
Suppressed cross-talk pixel-array substrate and fabrication method
Granted: September 10, 2024
Patent Number:
12087792
A reduced cross-talk pixel-array substrate includes a semiconductor substrate, a buffer layer, a metal annulus, and an attenuation layer. The semiconductor substrate includes a first photodiode region. A back surface of the semiconductor substrate forms a trench surrounding the first photodiode region in a cross-sectional plane parallel to a first back-surface region of the back surface above the first photodiode region. The buffer layer is on the back surface and has a feature located…
Multi-layer metal stack for active pixel region and black pixel region of image sensor and methods thereof
Granted: September 3, 2024
Patent Number:
12080740
An image sensor includes an active pixel photodiode, a black pixel photodiode, a metal grid structure, and a light shield. Each of the active pixel photodiode and the black pixel photodiode are disposed in a semiconductor material having a first side and a second side opposite the first side. The first side of the semiconductor material is disposed between the light shield and the black pixel photodiode. The metal grid structure includes a first multi-layer metal stack including a first…
Image signal and phase detection autofocus signal extraction and storage in an arithmetic logic unit
Granted: August 27, 2024
Patent Number:
12075179
An arithmetic logic unit (ALU) includes a front end latch stage coupled to a signal latch stage coupled to a Gray code (GC) to binary stage. First inputs of an adder stage are coupled to receive outputs of the GC to binary stage. An adder input latch stage includes first and second adder input latches including first and second inputs coupled to receive outputs of the GC to binary stage. An adder input multiplexer stage includes an output coupled to second inputs of the adder stage, and…
Readout architectures for dark current reduction in indirect time-of-flight sensors
Granted: August 20, 2024
Patent Number:
12069391
A pixel circuit includes a photodiode configured to photogenerate charge in response to reflected modulated light incident upon the photodiode. A first floating diffusion is configured to store a first portion of charge photogenerated in the photodiode. A first transfer transistor is configured to transfer the first portion of charge from the photodiode to the first floating diffusion in response to a first phase signal. A first storage node is configured to store the first portion of…
Endoscope tip assembly using cavity interposer to allow coplanar camera and LEDs
Granted: August 20, 2024
Patent Number:
12064090
A cavity interposer has a cavity, first bondpads adapted to couple to a chip-type camera cube disposed within a base of the cavity at a first level, the first bondpads coupled through feedthroughs to second bondpads at a base of the interposer at a second level; and third bondpads adapted to couple to a light-emitting diode (LED), the third bondpads at a third level. The third bondpads coupled to fourth bondpads at the base of the interposer at the second level; and the second and fourth…
Apparatus and method for curved-surface image sensor
Granted: August 13, 2024
Patent Number:
12062673
A curved-surface image-sensor assembly has a porous carrier having a concave surface with a thinned image sensor bonded by an adhesive to its concave surface of the porous carrier; the porous carrier is mounted into a water-resistant package. The sensor assembly is made by fabricating a thinned, flexible, image-sensor integrated circuit (IC) and applying adhesive to a non-illuminated side of the IC; positioning the IC over a concave surface of a porous carrier; applying vacuum through…
Pixel layout with photodiode region partially surrounding circuitry
Granted: August 13, 2024
Patent Number:
12062670
An image sensor comprises a first photodiode region and circuitry. The first photodiode region is disposed within a semiconductor substrate proximate to a first side of the semiconductor substrate to form a first pixel. The first photodiode region includes a first segment coupled to a second segment. The circuitry includes at least a first electrode associated with a first transistor. The first electrode is disposed, at least in part, between the first segment and the second segment of…
High dynamic range CMOS image sensor pixel with reduced metal-insulator-metal lateral overflow integration capacitor lag
Granted: August 6, 2024
Patent Number:
12058460
A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a bias voltage source and the floating diffusion. The reset transistor is configured to be switched in…
Split floating diffusion pixel layout design
Granted: July 23, 2024
Patent Number:
12047694
A pixel array includes pixel circuits including a first pixel circuit having first and second split floating diffusions receiving charge from first and third photodiodes through first and third transfer transistors, and from second and fourth photodiodes through second and fourth transfer transistors, respectively. A first shared gate structure includes gates of first transfer transistors of first and second pixel circuits. A third shared gate structure includes gates of third transfer…
Stacked image sensor
Granted: July 9, 2024
Patent Number:
12035060
A stacked image sensor includes a signal-processing circuitry layer, a pixel-array substrate, a heat-transport layer, and a thermal via. The signal-processing circuitry layer includes a conductive pad exposed on a circuitry-layer bottom surface of the signal-processing circuitry layer. The pixel-array substrate includes a pixel array and is disposed on a circuitry-layer top surface of the signal-processing circuitry layer. The circuitry-layer top surface is between the circuitry-layer…
Image sensors with improved negative pump voltage settling, and circuitry for the same
Granted: July 9, 2024
Patent Number:
12034368
Image sensors with improved negative pump voltage settling, and circuitry for the same, are disclosed herein. In one embodiment, a power supply settling circuit includes a negative charge pump and a reference voltage generator. An output of the negative charge pump is selectively coupled to a first node of the negative pump settling circuit via a first switch, and an output of the reference voltage generator is selectively coupled to a second node of the negative pump settling circuit…
Semiconductor device contact pad and method of contact pad fabrication
Granted: July 9, 2024
Patent Number:
12034027
A method for forming a contact pad of a semiconductor device is disclosed. The method includes providing a semiconductor substrate including a first side and a second side. The semiconductor device includes a shallow trench isolation structure, disposed between the first side and the second side, and an intermetal dielectric stack coupled to the second side. The intermetal dielectric stack includes a first metal interconnect. The method further includes etching a first trench into the…
Privacy-preserving image sensor
Granted: June 18, 2024
Patent Number:
12014558
In some embodiments, an image sensor is provided. A signal processing unit of the image sensor is configured with executable instructions that cause the signal processing unit to perform actions comprising: reading a captured scene from a pixel array; reading a value from a test initiation register; in response to determining that the value indicates a test mode: processing the captured scene to detect a region of interest associated with the value; and providing the region of interest…
Column ASIL circuit for multiple bitlines in an image sensor
Granted: June 11, 2024
Patent Number:
12005890
A failure detection circuit for an image sensor includes a first input node, an array of second input nodes, and an output stage. The first input node is coupled to a reference voltage. The array of second input nodes has each input node coupled to receive a signal from a bitline of a bitline array in an image sensor that includes an array of pixels with each pixel is coupled to at least one bitline of the bitline array. The output stage is coupled to generate an output voltage…
Low power event driven pixels with passive, differential difference detection circuitry, and reset control circuits for the same
Granted: May 21, 2024
Patent Number:
11991465
Low power event driven pixels with passive, differential difference detection circuitry (and reset control circuits for the same) are disclosed herein. In one embodiment, an event driven pixel comprises a photosensor, a photocurrent-to-voltage converter, and a difference circuit. The difference circuit includes (a) a first circuit branch configured to sample a reference light level based on a voltage output by the photocurrent-to-voltage converter, and to output a first analog light…
Column arithmetic logic unit design for dual conversion gain sensor supporting correlated multiple sampling and three readout phase detection autofocus
Granted: May 21, 2024
Patent Number:
11991458
An arithmetic logic unit (ALU) includes a front end latch stage coupled to a signal latch stage coupled to a Gray code (GC) to binary stage. First inputs of an adder stage are coupled to receive outputs of the GC to binary stage. Outputs of the adder stage are generated in response to the first inputs and second inputs of the adder stage. A pre-latch stage is coupled to latch outputs of the adder stage. A feedback latch stage is coupled to latch outputs of the pre-latch stage. The second…
Vertical transfer structures
Granted: May 21, 2024
Patent Number:
11990496
Pixels, such as for image sensors and electronic devices, include a photodiode formed in a semiconductor substrate, a floating diffusion, and a transfer structure selectively coupling the photodiode to the floating diffusion. The transfer structure includes a transfer gate formed on the semiconductor substrate, and a vertical channel structure including spaced apart first doped regions formed in the semiconductor substrate between the transfer gate and the photodiode. Each spaced apart…
CMOS image sensor having front side and back side trench isolation structures enclosing pixel regions and a capacitor for storing the image charge
Granted: May 14, 2024
Patent Number:
11984464
Examples of the disclosed subject matter propose disposing trench isolation structure around the perimeter of the pixel transistor region of the pixel cell. The trench isolation structure includes front side (e.g., shallow and deep) trench isolation structure and back side deep trench isolation structure that abut against or contacts the bottom of front side deep trench isolation structure for isolating the pixel transistor channel of the pixel cell's pixel transistor region. The…
