Power Integrations Patent Applications

Lateral power MOSFET for high switching speeds

Granted: July 24, 2003
Application Number: 20030137016
A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.

Integrated circuit with closely coupled high voltage output and offline transistor pair

Granted: June 19, 2003
Application Number: 20030112052
An integrated circuit fabricated in a single silicon substrate includes a high-voltage output transistor having source and drain regions separated by a channel region, and a gate disposed over the channel region. Also included is an offline transistor having source and drain regions separated by a channel region and a gate disposed over the channel region of the offline transistor. A drain electrode is commonly coupled to the drain region of the high-voltage output transistor and to the…

LATERAL POWER MOSFET FOR HIGH SWITCHING SPEEDS

Granted: May 1, 2003
Application Number: 20030080388
A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.

High-voltage transistor with buried conduction layer

Granted: April 3, 2003
Application Number: 20030062548
A lateral, high-voltage, FET having a low on-resistance and a buried conduction layer comprises a P-type buried layer region within an N-well formed in a P-type substrate. The P-type buried layer region is connected to a drain electrode by a first P-type drain diffusion region that is disposed in the N-well region. The P-type buried layer region is also connected to a second P-type drain diffusion region that extends down from the surface at one end of the PMOS gate region. A P-type…

Method and apparatus for reducing audio noise in a switching regulator

Granted: April 3, 2003
Application Number: 20030062879
A switching regulator utilizing on/off control that reduces audio noise at light loads by adjusting the current limit of the switching regulator. In one embodiment, a switching regulator includes a state machine that adjusts the current limit of the switching regulator based on a pattern of feedback signal values from the output of the power supply for a preceding N cycles of the drive signal. The state machine adjusts the current limit lower at light loads such that cycles are not…

Method of fabricating a high-voltage transistor with a multi-layered extended drain structure

Granted: March 27, 2003
Application Number: 20030057524
A method for fabricating a high-voltage transistor with an extended drain region comprises forming an epitaxial layer on a substrate, the epitaxial layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair of spaced-apart trenches that define first and second sidewall portions of the epitaxial layer. A dielectric layer is formed that partially fills each of the trenches, covering the first and second sidewall portions. The remaining…

Method of fabricating a high-voltage transistor with a multi-layered extended drain structure

Granted: March 27, 2003
Application Number: 20030060001
A method for fabricating a high-voltage transistor with an extended drain region comprises forming an epitaxial layer on a substrate, the epitaxial layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair of spaced-apart trenches that define first and second sidewall portions of the epitaxial layer. A dielectric layer is formed that partially fills each of the trenches, covering the first and second sidewall portions. The remaining…

Method of fabricating a high-voltage transistor

Granted: March 20, 2003
Application Number: 20030054598
A method for making a high voltage insulated gate field-effect transistor with multiple JFET conduction channels comprises successively implanting a dopant of a first conductivity type in a first substrate of a second conductivity type so as to form a first plurality of buried layers disposed at a different vertical depths. The first substrate is flipped over and then bonded to a second substrate of the first conductivity type. After the first substrate has been thinned, another set of…

High-voltage lateral transistor with a multi-layered extended drain structure

Granted: March 13, 2003
Application Number: 20030047788
A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. With the field plate members at the lowest circuit potential, the transistor supports high voltages applied to the drain in the off-state. The layered structure may be…

Method of fabricating a high-voltage transistor with a multi-layered extended drain structure

Granted: March 13, 2003
Application Number: 20030049930
A method for fabricating a high-voltage transistor with an extended drain region comprises forming an epitaxial layer on a substrate, the epitaxial layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair of spaced-apart trenches that define first and second sidewall portions of the epitaxial layer. A dielectric layer is formed that partially fills each of the trenches, covering the first and second sidewall portions. The remaining…

Method and apparatus for dissipative clamping of an electrical circuit

Granted: March 13, 2003
Application Number: 20030048646
Dissipative clamping apparatuses and methods for electrical circuits. In one aspect of the invention, In one aspect of the invention, a method includes switching a power supply input on an energy transfer element, regulating a power supply output by switching the power supply input on the energy transfer element, clamping a voltage on the energy transfer element to a clamp voltage and varying the clamp voltage in response to the power supply input. In another aspect, an electrical…

High-voltage vertical transistor with a multi-layered extended drain structure

Granted: March 13, 2003
Application Number: 20030047793
A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. With the field plate members at the lowest circuit potential, the transistor supports high voltages applied to the drain in the off-state. The layered structure may be…

High-voltage lateral transistor with a multi-layered extended drain structure

Granted: March 13, 2003
Application Number: 20030047792
A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. The layered structure may be fabricated in a variety of orientations. A MOSFET structure may be incorporated into the device adjacent to the source region, or,…

High-voltage vertical transistor with a multi-layered extended drain structure

Granted: March 13, 2003
Application Number: 20030047769
A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. With the field plate members at the lowest circuit potential, the transistor supports high voltages applied to the drain in the off-state. The layered structure may be…

High-voltage vertical transistor with a multi-layered extended drain structure

Granted: March 13, 2003
Application Number: 20030047768
A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. With the field plate members at the lowest circuit potential, the transistor supports high voltages applied to the drain in the off-state. The layered structure may be…

Method of making a high-voltage transistor with buried conduction regions

Granted: March 6, 2003
Application Number: 20030042541
A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried layers create an associated plurality of parallel JFET conduction channels in the extended portion of the well region. The parallel JFET conduction channels provide the HVFET with a low on-state…

Methods for trimming electrical parameters in an electrical circuit

Granted: February 27, 2003
Application Number: 20030037435
Electrical circuit trimming methods. In one aspect of the invention, a trimming method includes assembling one or more components of an electrical circuit onto a printed circuit board having one or more electrical connections coupled to the said one or more components. An electrical parameter of the electrical circuit is then trimmed. The trimming of the electrical parameter of the electrical circuit includes removing a portion of the printed circuit board to break the electrical…

Switched mode power supply responsive to current derived from voltage across energy transfer element input

Granted: February 20, 2003
Application Number: 20030035303
A switched mode power supply having a regulated reflected voltage. In one embodiment, a switched mode power supply includes a power supply regulator coupled between a positive input supply rail of the power supply and a primary winding of an energy transfer element. The reflected voltage across the primary winding of the transfer element is related to the output voltage across a secondary winding of the energy transfer element according to the turns ratio of the energy transfer element.…

High-voltage transistor with multi-layer conduction region

Granted: February 6, 2003
Application Number: 20030025155
A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried layers create an associated plurality of parallel JFET conduction channels in the extended portion of the well region. The parallel JFET conduction channels provide the HVFET with a low on-state…

Fault condition protection

Granted: December 5, 2002
Application Number: 20020181179
A circuit protects a power conversion system with a feedback control loop from a fault condition. The circuit has an oscillator having an input for generating a signal with a frequency and a timer connected to the oscillator input and to the feedback control loop. The timer disables the oscillator after a period following the opening of the feedback control loop to protect the power conversion system.