Sandisk Patent Grants

Data integrity enhancement to protect against returning old versions of data

Granted: November 21, 2017
Patent Number: 9824007
Systems, methods and/or devices are used to enable enhancing data integrity to protect against returning old versions of data. In one aspect, the method includes (1) receiving a write request from a host that specifies write data for a set of logical block addresses in a logical address space of the host, (2) mapping the set of logical block addresses to a set of physical addresses corresponding to physical pages of the storage device, and (3) performing one or more operations for each…

Systems and methods for a de-duplication cache

Granted: November 21, 2017
Patent Number: 9824018
A de-duplication is configured to cache data for access by a plurality of different storage clients, such as virtual machines. A virtual machine may comprise a virtual machine de-duplication module configured to identify data for admission into the de-duplication cache. Data admitted into the de-duplication cache may be accessible by two or more storage clients. Metadata pertaining to the contents of the de-duplication cache may be persisted and/or transferred with respective storage…

Apparatus, system, and method for a storage area network

Granted: November 21, 2017
Patent Number: 9824027
An apparatus and system are disclosed for a storage area network (“SAN”). In one embodiment, a computer system includes an internal storage device and an internal storage controller. In this embodiment, the internal storage controller is configured to implement a SAN that includes at least the internal storage device and a storage device external to the computer system. In this embodiment, the internal storage controller is further configured to service a storage request received…

Systems and methods of generating shaped random bits

Granted: November 21, 2017
Patent Number: 9824760
A device includes a non-volatile memory and a controller coupled to the non-volatile memory. The controller is configured to initiate writing of first data to a first portion of a group of storage elements of the non-volatile memory. The controller is further configured to initiate writing of shaped dummy data to a second portion of the group of storage elements.

Three-dimensional memory device containing a lateral source contact and method of making the same

Granted: November 21, 2017
Patent Number: 9824966
A sacrificial film and an alternating stack of insulating layers and sacrificial material layers are sequentially formed over a substrate. A memory stack structure including a memory film and a vertical semiconductor channel is formed through the alternating stack and the sacrificial film on the substrate. A source level cavity is formed by introducing an etchant or a reactant through a backside trench and removing the sacrificial film. After removal of an annular portion of the memory…

Process for word line connections in 3D memory

Granted: November 21, 2017
Patent Number: 9825048
A 3D memory has multiple memory layers stacked on top of a substrate. Word lines in different memory layers are connected respectively to different columns of contact pads in the substrate directly under the multiple memory layers. The connection is accomplished by creating vertical shifts above each contact pad and creating a vertical word line VIA connecting to the contact pad. For a given memory layer and its column of vertical word line VIAs, an auxiliary vertical shaft down to the…

Three dimensional NAND device containing fluorine doped layer and method of making thereof

Granted: November 21, 2017
Patent Number: 9825051
A method of making a monolithic three dimensional NAND string comprising forming a stack of alternating layers of a first material and a second material different from the first material over a substrate, forming an at least one front side opening in the stack and forming at least a portion of a memory film in the at least one front side opening. The method also includes forming a semiconductor channel in the at least one front side opening and doping at least one of the memory film and…

Virtual critical path (VCP) system and associated methods

Granted: November 21, 2017
Patent Number: 9825638
A virtual critical path (VCP) circuit is defined separate from an actual critical path circuit. The VCP operates in accordance with a special clock signal. The actual critical path circuit operates in accordance with a system clock signal. The VCP circuit has a signal timing characteristic substantially equal to that of the actual critical path circuit. The VCP circuit includes computational circuitry defined to compute an output value based on an input value, and comparison circuitry…

Block management in non-volatile memory system with non-blocking control sync system

Granted: November 14, 2017
Patent Number: 9817593
In a non-volatile memory system, the controller maintains in its volatile memory two free block lists for the assignment of memory circuit blocks when writing user and system data. Copies of the free block lists are maintained in the non-volatile memory. While allocating blocks from a first of the free block lists, the controller can update a second of the free block lists as part of a control sync operation preparing control data stored in non-volatile memory. This allows the memory…

Systems and methods of storing data associated with content of a data storage device

Granted: November 14, 2017
Patent Number: 9817605
A method performed in a host device includes receiving an input based on a user-visible code associated with a data storage device. The user-visible code corresponds to an identifier of the data storage device. The method includes sending first data associated with the identifier to a server via a network and receiving, from the server at a first time, a copy of second data identifying content stored in the data storage device. The second data is stored in a network-based storage device…

Apparatus and method of offloading processing from a data storage device to a host device

Granted: November 14, 2017
Patent Number: 9817749
A storage device includes non-volatile memory and a controller. A method performed in the data storage device includes sending an instruction to a host device to cause the host device to perform one or more specified computations. The method further includes receiving a response from the host device. The response is based on execution of the one or more specified computations.

Data integrity enhancement to protect against returning old versions of data

Granted: November 14, 2017
Patent Number: 9817752
Systems, methods and/or devices are used to enhance data integrity to protect against returning old versions of data. In one aspect, a method includes (1) receiving a write request from a host that specifies write data for a set of logical block addresses, (2) mapping, using a mapping table, the set of logical block addresses to a set of physical addresses, where the mapping table includes a plurality of subsets, and (3) performing operations for each subset of the mapping table that…

Methods, systems, and computer readable media for optimization of host sequential reads or writes based on volume of data transfer

Granted: November 14, 2017
Patent Number: 9817761
A method for optimization of host sequential reads based on volume of data includes, at a mass data storage device, pre-fetching a first volume of predicted data associated with an identified read data stream from a data store into a buffer memory different from the data store. A request for data from the read data stream is received from a host. In response, the requested data is provided to the host from the buffer memory. While providing the requested data to the host from the buffer…

Through-memory-level via structures for a three-dimensional memory device

Granted: November 14, 2017
Patent Number: 9818693
A three dimensional NAND memory device includes word line driver devices located on or over a substrate, an alternating stack of word lines and insulating layers located over the word line driver devices, a plurality of memory stack structures extending through the alternating stack, each memory stack structure including a memory film and a vertical semiconductor channel, and through-memory-level via structures which electrically couple the word lines in a first memory block to the word…

Through-memory-level via structures for a three-dimensional memory device

Granted: November 14, 2017
Patent Number: 9818759
A three dimensional NAND memory device includes word line driver devices located on or over a substrate, an alternating stack of word lines and insulating layers located over the word line driver devices, a plurality of memory stack structures extending through the alternating stack, each memory stack structure including a memory film and a vertical semiconductor channel, and through-memory-level via structures which electrically couple the word lines in a first memory block to the word…

Vertical thin film transistors in non-volatile storage systems

Granted: November 14, 2017
Patent Number: 9818798
Three-dimensional (3D) non-volatile memory arrays having a vertically-oriented thin film transistor (TFT) select device and method of fabricating are described. The vertically-oriented TFT may be used as a vertical bit line selection device to couple a global bit line to a vertical bit line. A select device pillar includes a body and upper and lower source/drain regions. At least one gate is separated horizontally from the select device pillar by a gate dielectric. Each gate is formed…

Resistive three-dimensional memory device with heterostructure semiconductor local bit line and method of making thereof

Granted: November 14, 2017
Patent Number: 9818801
A three-dimensional resistive memory device includes an alternating stack of electrically conductive layers and insulating layers. Resistive memory elements are provided between the electrically conductive layers and a semiconductor local bit line. The semiconductor local bit line includes a heterostructure of an inner semiconductor material layer having an inner-material band gap and an outer semiconductor material layer having an outer-material band gap that is narrower than the…

Device for controlling access to user-selectable content

Granted: November 14, 2017
Patent Number: 9819489
A device having user-selectable content includes a storage having the capacity to store pre-loaded content and a controller. The controller is operative to manage access to the pre-loaded content, by way of limiting the access to a user-selected portion of the pre-loaded content. The controller limits access subject to and performed according to an indication of an initial purchase transaction. Also provided is a controller that includes a processing unit and an interface to a memory.…

Modular fashion accessory

Granted: November 14, 2017
Patent Number: 9819850
A particular apparatus includes a first electronic component, a second electronic component, and a connecting element that is detachably connectable to the first electronic component and to the second electronic component. The first electronic component is connectable via the connecting element to the second electronic component to form a wearable item. The first electronic component includes a camera, the second electronic component includes an energy storage component, and the first…

Non-volatile memory with intelligent temperature sensing and local throttling

Granted: November 7, 2017
Patent Number: 9811267
A non-volatile storage apparatus comprises a controller, one or more memory packages, a system temperature sensor, and one or more memory temperature sensors. The system temperature sensor is located at or on the controller. Each of the one or more memory temperature sensors are positioned at one of the one or more memory packages. The controller monitors system temperature using the system temperature sensor. If the system temperature is above a first threshold, then temperature is…