FAST STARTUP HYBRID MEMORY MODULE
Granted: June 13, 2013
Application Number:
20130148457
A memory device is provided comprising: a volatile memory device, a non-volatile memory device, a memory control circuit volatile memory controller coupled to the volatile memory device and non-volatile memory device, and a backup power source. The backup power source may be arranged to temporarily power the volatile memory devices and the memory control circuit upon a loss of power from the external power source. Additionally, a switch may serve to selectively couple: (a) a host memory…
BATTERY-LESS CACHE MEMORY MODULE WITH INTEGRATED BACKUP
Granted: June 6, 2013
Application Number:
20130142001
A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The…
PRINTED CIRCUIT BOARDS WITH EMBEDDED ELECTRO-OPTICAL PASSIVE ELEMENT FOR HIGHER BANDWIDTH TRANSMISSION
Granted: May 9, 2013
Application Number:
20130112465
A printed circuit board (PCB) is provided comprising a plurality of non-conductive layers with conductive or signal layers in between. The PCB includes a first conductive via traversing the plurality of non-conductive and conductive or signal layers as well as a second conductive via traversing the plurality of non-conductive layers and conductive or signal layers, the second conductive via located substantially parallel to the first conductive via. An embedded electro-optical passive…
MEMORY BUS ARCHITECTURE FOR CONCURRENTLY SUPPORTING VOLATILE AND NON-VOLATILE MEMORY MODULES
Granted: June 21, 2012
Application Number:
20120159045
A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules…
RADIO FREQUENCY IDENTIFICATION FOR COLLECTING STAGE-BY-STAGE MANUFACTURING AND/OR POST-MANUFACTURING INFORMATION ASSOCIATED WITH A CIRCUIT BOARD
Granted: June 14, 2012
Application Number:
20120146794
A radio frequency identification (RFID) tag is coupled to a circuit board to track the specific operating and environmental conditions of each stage as the circuit board passes through one or more manufacturing and/or post-manufacturing stages. An RFID reader and data collector are used at each stage to read the RFID tag and store its identifying information along with processing information, operating conditions, and results for each stage. This permits to quickly and accurately collect…
MEMORY CONTROLLER SUPPORTING CONCURRENT VOLATILE AND NONVOLATILE MEMORY MODULES IN A MEMORY BUS ARCHITECTURE
Granted: March 8, 2012
Application Number:
20120059970
A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules…
MEMORY BUS ARCHITECTURE FOR CONCURRENTLY SUPPORTING VOLATILE AND NON-VOLATILE MEMORY MODULES
Granted: March 8, 2012
Application Number:
20120059967
A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules…
SYSTEMS AND METHODS FOR TRACKING INSERTION AND REMOVAL CYCLES OF OPTICAL TRANSCEIVER MODULES
Granted: March 1, 2012
Application Number:
20120051490
Methods and/or devices are provided for monitoring life-expectancy and/or useful life of an optical transceiver module by tracking an insertion cycle count of an optical transceiver module. An alarm/warning indicator may be generated or the optical transceiver module can be disabled completely if the insertion cycle count exceeds a predefined threshold. The host device first detects the insertion of the optical transceiver module and then reads the cycle count along with an identifier…
MULTI-USE REMOVABLE ELECTRONIC DATA STORAGE DEVICE CARRIER MODULE
Granted: November 3, 2011
Application Number:
20110267764
A built-in dual purpose interposer device for a data storage device carrier mechanism is provided. The interposer device may fill empty or voided space in the carrier mechanism created when a data storage device is changed between a “direct plug” position, or first configuration, and an “interposer” position, or second configuration. The interposer device may be changed back and forth between the first and second configuration multiple times. When in the first configuration, the…
METHOD AND APPARATUS FOR SUPPORTING STORAGE MODULES IN STANDARD MEMORY AND/OR HYBRID MEMORY BUS ARCHITECTURES
Granted: June 23, 2011
Application Number:
20110153903
A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules…
Circuit Board with Radio Frequency Identification for Collecting Stage-by-Stage Manufacturing Metrics
Granted: June 9, 2011
Application Number:
20110133899
A radio frequency identification (RFID) tag is coupled to a circuit board to track the specific operating and environmental conditions of each manufacturing stage as the circuit board passes through the manufacturing stages. An RFID reader and data collector are used at each stage to read the RFID tag and store its identifying information along with processing information, operating conditions, and results for each stage. This permits to quickly and accurately collect manufacturing…
RACK SYSTEM
Granted: January 20, 2011
Application Number:
20110012489
A rack system for housing electronic and/or electrical equipment is provided comprising a rectangular base frame, a rectangular top frame, and four elongated vertical support members each extending along a longitudinal axis between and joined to two associated corners of the rectangular base frame and the rectangular top frame. The rectangular base frame, rectangular top frame, and the four elongated vertical support members may be constructed from members having the same substantially…
BATTERY-LESS CACHE MEMORY MODULE WITH INTEGRATED BACKUP
Granted: January 14, 2010
Application Number:
20100008175
A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The…
Simultaneous and Selective Partitioning of Via Structures Using Plating Resist
Granted: November 26, 2009
Application Number:
20090288874
Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the…
System and method for base station heat dissipation using chimneys
Granted: February 5, 2009
Application Number:
20090036167
A base station system and method for base station heat dissipation using chimneys where the base station system comprises a first structure, an enclosure, and a chimney. The first structure supports base station circuitry that generates heat. The enclosure encloses the first structure and the base station circuitry and forms an internal space. The chimney comprises a second structure forming dedicated space for heat dissipation. The chimney transfers the heat generated by the base…
Substantially Continuous Layer of Embedded Transient Protection For Printed Circuit Boards
Granted: January 29, 2009
Application Number:
20090025213
The protection of sensitive components on printed circuit boards by using planar transient protection material in one or more layers of a printed circuit board stackup is disclosed.
Systems and Methods For Base Station Enclosures
Granted: January 8, 2009
Application Number:
20090008076
A technique for climate control of, for example, base station circuitry within an enclosure involves placing base station circuitry within the enclosure and controlling the climate therein. A system according to this technique includes an enclosure suitable for use outside in a wide range of extreme weather conditions. A controller may, for example, control a fan tray with a heater to pull ambient air through a filtration unit, through the fan tray where the air is heated, and through…
Simultaneous and selective partitioning of via structures using plating resist
Granted: December 11, 2008
Application Number:
20080301934
Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the…
Simultaneous and selective partitioning of via structures using plating resist
Granted: December 4, 2008
Application Number:
20080296057
Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the…
EMBEDDED CAPACITIVE STACK
Granted: September 11, 2008
Application Number:
20080217049
A novel method for manufacturing embedded a capacitive stack and a novel capacitive stack apparatus are provided having a capacitive core that serves as a structural substrate on which alternating thin conductive foils and nanopowder-loaded dielectric layers may be added and tested for reliability. This layering and testing allows early fault detection of the thin dielectric layers of the capacitive stack. The capacitive stack may be configured to supply multiple isolated capacitive…
