System and method for maintaining and recovering data consistency in a data base page
Granted: January 31, 2006
Patent Number:
6993523
The present invention is a system and method that facilitates consistency maintenance and recovery from a system or process crash with valid data. A data consistency maintenance and recovery system and method of the present invention utilizes a dual page configuration and locking process to store and track data. A primary page is utilized as the primary data storage location and a mirror page operates as copy of the primary page except during certain stages of data manipulation (e.g., a…
System and method for decoupling the user interface and application window in a graphics application
Granted: January 10, 2006
Patent Number:
6985149
A system and method for generating a image, where the image comprises both a graphical user interface (GUI) and a subject graphics image. A first graphics pipeline renders the subject graphics image. A second graphics pipeline renders the GUI graphics data. A compositor then composites together the rendered subject graphics data that is produced by the first graphics pipeline, and the rendered GUI graphics data that is produced by the second graphics pipeline.
Packetized data transmissions in a switched router architecture
Granted: January 10, 2006
Patent Number:
6985484
A switched router for transmitting packetized data concurrently between a plurality of devices coupled to the switched router. The devices are coupled to the I/O ports of the switched router. The switched router is then programmed to route packets of data from various source ports to several destination ports. Different packets may be transmitted concurrently through the switched router. The packets are comprised of a command word containing information corresponding to packet routing,…
System and method for hierarchical approximation of least recently used replacement algorithms within a cache organized as two or more super-ways of memory blocks
Granted: January 10, 2006
Patent Number:
6986001
A system for approximating a least recently used (LRU) algorithm for memory replacement in a cache memory. In one system example, the cache memory comprises memory blocks allocated into sets of N memory blocks. The N memory blocks are allocated as M super-ways of N/M memory blocks where N is greater than M. An index identifies the set of N memory blocks. A super-way hit/replacement tracking state machine tracks hits and replacements to each super-way and maintains state corresponding to…
System and method for managing graphics applications
Granted: January 3, 2006
Patent Number:
6982682
A system and method for managing graphics applications include the capability to receive graphics data from an unaware graphics application and convey the graphics data to at least one of a plurality of graphics pipes having different display directions. The system and method further include the capability to modify the graphics data to account for non-planar display of the graphics data.
Method and system for maintaining data at input/output (I/O) interfaces for a multiprocessor system
Granted: December 27, 2005
Patent Number:
6981101
A multiprocessor system and method includes a processing sub-system having a plurality of processors and a processor memory system. A scalable network is operable to couple the processing sub-system to an input/output (I/O) sub-system. The I/O sub-system includes a plurality of I/O interfaces. Each I/O interface has a local cache and is operable to couple a peripheral device to the multiprocessor system and to store copies of data from the processor memory system in the local cache for…
Scalable hypercube multiprocessor network for massive parallel processing
Granted: December 6, 2005
Patent Number:
6973559
A system and method for interconnecting a plurality of processing element nodes within a scalable multiprocessor system is provided. Each processing element node includes at least one processor and memory. A scalable interconnect network includes physical communication links interconnecting the processing element nodes in a cluster. A first set of routers in the scalable interconnect network route messages between the plurality of processing element nodes. One or more metarouters in the…
Common user interface development toolkit for a system administration program
Granted: November 29, 2005
Patent Number:
6971086
A toolkit for developing user-interfaces for a system administration program. The toolkit has a server-side application-programming interface (API). The server-side has task-registry files that each describe a task group. The toolkit also has a client-side API. A developer can customize product-specific properties files for a specific product and write code that calls the server-side and client-side APIs to create a graphical user interface for the specific product.
Clustered filesystem
Granted: September 27, 2005
Patent Number:
6950833
A cluster of computer system nodes share direct read/write access to storage devices via a storage area network using a cluster filesystem. Version information about subsystems is acquired by a leader node when forming a cluster membership and distributed to all nodes in the cluster to enable proper messaging during operation. Access to files on the storage devices is arbitrated by the cluster filesystem using tokens. Upon detection of a change in location of the metadata server, client…
System and method for reducing memory latency during read requests
Granted: August 30, 2005
Patent Number:
6938128
A processor (500) issues a read request for data. A processor interface (24) initiates a local search for the requested data and also forwards the read request to a memory directory (24) for processing. While the read request is processing, the processor interface (24) can determine if the data is available locally. If so, the data is transferred to the processor (500) for its use. The memory directory (24) processes the read request and generates a read response therefrom. The processor…
System and method for image-based rendering with proxy surface animation
Granted: August 2, 2005
Patent Number:
6924805
Methods and systems for animating with proxy surfaces are provided. A method for animating includes preprocessing an object to form proxy surfaces of part(s) and/or joint(s), and rendering the proxy surfaces to be animated. In an embodiment, preprocessing includes dividing an object to be animated into parts that can move independently without changing shape, forming a proxy surface for each of the parts corresponding to an initial viewing direction, and obtaining a set of view textures…
Remote address translation in a multiprocessor system
Granted: August 2, 2005
Patent Number:
6925547
A method of performing remote address translation in a multiprocessor system includes determining a connection descriptor and a virtual address at a local node, accessing a local connection table at the local node using the connection descriptor to produce a system node identifier for a remote node and a remote address space number, communicating the virtual address and remote address space number to the remote node, and translating the virtual address to a physical address at the remote…
Dual-bank FIFO for synchronization of read data in DDR SDRAM
Granted: July 19, 2005
Patent Number:
6920526
The present invention comprises a dual bank FIFO memory buffer operable to buffer read data from memory and thereby compensate for specific timing problems in certain computerized systems. One embodiment of the invention includes a dual bank FIFO that comprises a first bank of memory elements operable to buffer memory data and a second bank of memory elements operable to buffer memory data. Write control address logic is operable to store selected memory data in memory elements with…
Method and system for prefetching data
Granted: July 12, 2005
Patent Number:
6918010
In prefetching cache lines from a main memory to a cache memory, an array of memory locations to be prefetched is determined and a base address indicating a highest address in the array is identified as well as a loop index used to point to the first address in the array. A prefetch index, which is the loop index plus a latency/transfer value, is used to prefetch memory locations as the array is processed. After a memory location is prefetched and initialized, the loop index and the…
System and method for handling updates to memory in a distributed shared memory system
Granted: July 5, 2005
Patent Number:
6915387
A processor (100) in a distributed shared memory computer system (10) receives ownership of data and initiates an initial update to memory request. A front side bus processor interface (24) forwards the initial update to memory request to a memory directory interface unit (22). The front side processor interface (24) may receive subsequent update to memory requests for the data from processors co-located on the same local bus. Front side bus processor interface (24) maintains a most…
Method and system for efficient use of a multi-dimensional sharing vector in a computer system
Granted: July 5, 2005
Patent Number:
6915388
A multiprocessor computer system includes a plurality of processor nodes, a memory, and an interconnect network connecting the plurality of processor nodes to the memory. The memory includes a plurality of lines and a cache coherence directory structure. The plurality of lines includes a first line. The cache coherence directory structure includes a plurality of directory structure entries. Each directory structure entry includes processor pointer information indicating the processor…
Cache memory for identifying locked and least recently used storage locations
Granted: June 7, 2005
Patent Number:
6904501
A cache memory includes a plurality of data memory blocks and a code memory block. Each data memory block has a plurality of storage locations and has a particular storage location identified by a same index value. The code memory block has a plurality of code values with a particular code value being associated with the same index value. The particular code value is operable to identify which ones of the particular storage locations associated with the same index value are locked to…
Primitive culling apparatus and method
Granted: May 31, 2005
Patent Number:
6900818
A method and apparatus for processing a primitive for potential display on a display device (having a plurality of pixels) determines if the primitive intersects at least a predetermined number of pixel fragments on the display device. The predetermined number is no less than one. The method and apparatus then cull the primitive as a function of whether the primitive intersects at least the predetermined number of pixel fragments. If it is culled, the primitive is not raster processed…
Method and apparatus for prefetching information and storing the information in a stream buffer
Granted: May 31, 2005
Patent Number:
6901500
A system for prefetching information from a computer storage includes a central processing unit operable to transmit to a transfer bus a memory transfer request containing a desired memory address. The system also includes a system controller operable to receive the memory transfer request from the transfer bus and to retrieve a prefetch block of data from the computer storage in response to determining that a stream buffer local to the system controller does not contain a copy of data…
System, method, and computer program product for near-real time load balancing across multiple rendering pipelines
Granted: April 26, 2005
Patent Number:
6885376
A system, method, and computer program product for creating a sequence of computer graphics frames, using a plurality of rendering pipelines. For each frame, each rendering pipeline receives a subset of the total amount of graphics data for the particular frame. At the completion of a frame, each rendering pipeline sends a performance report to a performance monitor. The performance monitor determines whether or not there was a significant disparity in the time required by the respective…
