Method and rack for exchanging air with modular bricks in a computer system
Granted: April 19, 2005
Patent Number:
6882531
A modular computing system that includes an enclosure and a rack at least partially mounted within the enclosure. The modular computing system further includes a plurality of modular bricks that each include electronic components. The modular bricks are mounted in the rack and connected to the conduits in the rack. A fan is also connected to the conduits in the rack such that the rack exchanges air between the fan and each modular brick to cool the electronic components in each of the…
Synchronization of hardware simulation processes
Granted: April 12, 2005
Patent Number:
6879948
A system, method, and computer program product is presented for simulating a system of hardware components. Each component is simulated in a hardware definition language such as VERILOG. Each component is represented as a simulated device under test (DUT) that is incorporated into a simulation module. The invention synchronizes the simulation modules by issuing clock credit to each simulation module. Each simulation module can only operate when clock credit is available, and can only…
Method and apparatus for managing node controllers using partitions in a computer system
Granted: April 5, 2005
Patent Number:
6877029
A partitioned computer system (32) includes a plurality of node controllers (12) connected by a network (14) and partitioned into a plurality of partitioned groups (40). A requesting node controller (34) in one partitioned group (40) requests a latest copy of a line in a memory (17) in a separate partitioned group (40). A storing node controller (36) in the separate partitioned group (40) holding the latest copy of the line in its memory (17) is identified. The requesting node controller…
Method and system for cache coherence in DSM multiprocessor system without growth of the sharing vector
Granted: April 5, 2005
Patent Number:
6877030
The present invention is directed to a method and a system for maintaining cache coherence in a distributed shared memory (DSM) multiprocessor system. The method begins with a receiving of a shared access request by a receiving node, where the receiving node is an arbitrary node having at least one main memory unit containing information desired to be accessed. Then, the method determines whether the shared access request originates from a local node or from a remote node. When the…
GTL+Driver
Granted: March 8, 2005
Patent Number:
6864706
A driver operable with two power supplies, and provides, among other things, a high data communication rate, stabilized operating parameters including voltage output high, voltage output low, and on resistance, and edge rate over a wide range of variations in manufacturing process, operating voltages and temperature.
Method and system for managing data at an input/output interface for a multiprocessor system
Granted: February 22, 2005
Patent Number:
6859863
A multiprocessor system and method includes a processing sub-system including a plurality of processors and a processor memory system. A network is operable to couple the processing sub-system to an input/output (I/O) sub-system. The I/O sub-system includes a plurality of I/O interfaces each operable to couple a peripheral device to the multiprocessor system. The I/O interfaces each include a local memory operable to store a copy of data from the processor memory system for use by a…
Abstract verification environment
Granted: February 15, 2005
Patent Number:
6856950
A system and method of verifying an electronic system. A verification kernel is provided and the electronic system is expressed as a logic design. A wrapper is defined, wherein the wrapper is an interface between the logic design and the verification kernel. Tests to be run against the logic design are placed within a diagnostic program and an interface between the diagnostic program and the verification kernel is defined. The tests are then executed against the logic design. The results…
Compact flat panel color calibration system
Granted: February 8, 2005
Patent Number:
6853387
A compact flat panel color calibration system includes a lens prism optic able to pass a narrow, perpendicular, and uniform cone angle of incoming light to a spectrally non-selective photodetector. The calibration system also includes a microprocessor operable to determine the luminance of the display based upon the information gathered by the photodetector. A software module included in the calibration system is then operable to process the luminance information in order to adjust the…
Method and system for estimating interconnect delay
Granted: February 8, 2005
Patent Number:
6853969
A system and method for estimating interconnect delay are disclosed that include determining inductance of an interconnect. A transfer function is determined using the inductance, and two poles of the transfer function are determined. An interconnect delay is estimated using the two poles.
System and method for a hierarchical system management architecture of a highly scalable computing system
Granted: January 18, 2005
Patent Number:
6845410
A modular computer system includes at least two processing functional modules each including a processing unit adapted to process data and adapted to input/output data to other functional modules through at least two ports with each port including a plurality of data lines. At least one routing functional module is adapted to route data and adapted to input/output data to other functional modules through at least two ports with each port including a plurality of data lines. At least one…
Computer-related method and system for controlling data visualization in external dimension(s)
Granted: January 11, 2005
Patent Number:
6842176
A computer graphics display method and system for controlling data visualization in at least one external dimension is provided which allows better querying and navigation of data in external dimension space. A data visualization is displayed in a first display window. A summary window provides summary information on data for the data visualization across one or more external dimensions. First and second controllers are displayed for controlling the variation of the data visualization in…
Method and system for controlling data access between at least two memory arrangements
Granted: January 4, 2005
Patent Number:
6839820
A method and system for controlling an access to a first memory arrangement and a second memory arrangement. The method and system are adapted for controlling access to the first memory arrangement and to the second memory arrangement. A token is passed from a device associated with the first memory arrangement if the access to at least one portion of the first memory arrangement is completed, and the access to the portion of the memory arrangement is disabled. Then, upon a receipt of…
Method and circuit for reliable data capture in the presence of bus-master changeovers
Granted: January 4, 2005
Patent Number:
6839856
A bus interface circuit and method for reliable data capture in the presence of bus-master changeovers and/or for synchronizing received data to an internal clock signal, wherein the received data includes a strobe. Since the strobe may have a delay that is unknown (due to varying distances from the driver, clock jitter, and/or other causes), it is important to re-synchronize to the internal clock, and to do so with the smallest delay possible. This synchronization is provided in a way…
Method and system for forming an object proxy
Granted: December 14, 2004
Patent Number:
6831642
A system, method and computer program product for forming an object proxy. In one embodiment, a method forms an object proxy that approximates the geometry of an object. The method includes forming a volume that encompasses the object, forming an isosurface within the volume, adjusting the isosurface relative to a surface of the object, and pruning the isosurface to obtain the object proxy. An apparatus includes an isosurface former that forms an isosurface within a volume encompassing…
Synchronized image display and buffer swapping in a multiple display environment
Granted: December 14, 2004
Patent Number:
6831648
A system and method for synchronizing image display and buffer swapping in a multiple processor-multiple display environment. In a master-slave dichotomy, one processor or system is deemed the master and the others act as slaves. The master generates signals used to control vertical retrace and buffer swapping for itself and the slaves. In addition, a synchronization signal generator is provided to synchronize a timing signal between the master and slave systems.
Assembly process and heat sink design for high powerd processor
Granted: December 14, 2004
Patent Number:
6831834
The present invention includes one embodiment of a printed circuit board assembly including a printed circuit board, a microprocessor chip, a socket and an actuator for connecting the chip to the printed circuit board, a heat sink for attachment to the top surface of the chip, and a field installable thermal interface phase change pad positioned between the heat sink and the microprocessor chip. The heat sink has an actuator access opening so that the actuator is operable with the heat…
Variable mode bi-directional and uni-directional computer communication system
Granted: December 14, 2004
Patent Number:
6831924
A variable communication systems comprising a plurality of transceivers and a control circuit connected to the transceivers to configure the transceivers to operate in a bi-directional mode and a uni-directional mode at different times using different transfer methods to transfer data.
Modular computing architecture having common communication interface
Granted: December 7, 2004
Patent Number:
6829666
A distributed, shared memory computer architecture that is organized into a set of functionally independent processing nodes operating in a global, shared address space. Each node has one or more local processors, local memory and includes a common communication interface for communicating with other modules within the system via a message protocol. The common communication interface provides a single high-speed communications center within each node to operatively couple the node to one…
System and method for transferring ownership of data in a distributed shared memory system
Granted: December 7, 2004
Patent Number:
6829683
A processor (300) in a distributed shared memory system (10) has ownership of a cache line. The processor modifies the cache line and wishes to update the home memory (17) of the cache line with the modification. The processor (300) generates a return request for routing by a processor interface (24). Meanwhile, a second processor (400) wishes to obtain ownership of the cache line and sends a read request to a memory directory (22) associated with the home memory (17) of the cache line.…
System and method for displaying an image using display distortion correction
Granted: November 16, 2004
Patent Number:
6819333
A system (10) for display distortion correction includes a database (18) that stores one or more pixel correction vectors (40) and one or more sub-pixel correction vectors (42). The system (10) also includes a buffer (14) that receives and stores an input image data unit (32) including a plurality of pixels. Furthermore, the system includes a system controller (12) that is coupled to the database and to the buffer. The system controller (12) generates a coarsely-corrected image data unit…
