Restoring ECC syndrome in non-volatile memory devices
Granted: July 14, 2015
Patent Number:
9081710
A method of restoring an ECC syndrome in a non-volatile memory device having memory cells arranged in a plurality of sectors within a memory cell array, the method comprising identifying a first sector including at least one page having a disabled ECC (error correction code) flag; reading the value of all data bits in said at least one page; calculating values for ECC bits in said at least one page; and writing said data bit values and said calculated ECC bit values to a second sector in…
Partial allocate paging mechanism using a controller and a buffer
Granted: April 28, 2015
Patent Number:
9021186
A memory system is provided. The system includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the controller to regulate read and write access to the one or more FLASH devices. Wear leveling components along with read and write processing components are provided to facilitate efficient operations of the FLASH memory devices.
Mitigate flash write latency and bandwidth limitation by preferentially storing frequently written sectors in cache memory during a databurst
Granted: April 21, 2015
Patent Number:
9015420
A method of operating a memory system is provided. The method includes a controller that regulates read and write access to one or more FLASH memory devices that are employed for random access memory applications. A buffer component operates in conjunction with the controller to regulate read and write access to the one or more FLASH devices. Wear leveling components along with read and write processing components are provided to facilitate efficient operations of the FLASH memory…
Varied silicon richness silicon nitride formation
Granted: April 21, 2015
Patent Number:
9012333
A method, in one embodiment, can include forming a tunnel oxide layer on a substrate. In addition, the method can include depositing via atomic layer deposition a first layer of silicon nitride over the tunnel oxide layer. Note that the first layer of silicon nitride includes a first silicon richness. The method can also include depositing via atomic layer deposition a second layer of silicon nitride over the first layer of silicon nitride. The second layer of silicon nitride includes a…
Metal-insualtor-metal (MIM) device and method of formation thereof
Granted: April 21, 2015
Patent Number:
9012299
In a method of fabricating a metal-insulator-metal (MIM) device, initially, a first electrode is provided. An oxide layer is provided on the first electrode, and a protective layer is provided on the oxide layer. An opening through the protective layer is provided to expose a portion of the oxide layer, and a portion of the first electrode underlying the exposed portion of the oxide layer is oxidized. A second electrode is provided in contact with the exposed portion of the oxide layer.…
Recognition of speech with different accents
Granted: April 14, 2015
Patent Number:
9009049
Computer-based speech recognition can be improved by recognizing words with an accurate accent model. In order to provide a large number of possible accents, while providing real-time speech recognition, a language tree data structure of possible accents is provided in one embodiment such that a computerized speech recognition system can benefit from choosing among accent categories when searching for an appropriate accent model for speech recognition.
Multi-pass soft programming
Granted: March 31, 2015
Patent Number:
8995198
Disclosed herein are system, method and computer program product embodiments for utilizing soft programming a nonvolatile memory. An embodiment operates by sequentially applying a single soft programming voltage pulse to all memory cells along each word line in the nonvolatile memory that fail soft programming verification in a first phase. This sequential application of the single soft programming voltage pulse in the first phase may repeat a predetermined number of times or until a…
Senone scoring for multiple input streams
Granted: March 31, 2015
Patent Number:
8996374
Embodiments of the present invention include an apparatus, method, and system for calculating senone scores for multiple concurrent input speech streams. The method can include the following: receiving one or more feature vectors from one or more input streams; accessing the acoustic model one senone at a time; and calculating separate senone scores corresponding to each incoming feature vector. The calculation uses a single read access to the acoustic model for a single senone and…
Semiconductor device and control method of the same
Granted: March 31, 2015
Patent Number:
8995215
The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit connected to a core cell provided in a nonvolatile memory cell array, a second current-voltage conversion circuit connected to a reference cell through a reference cell data line, a sense amplifier sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion…
Methods circuits apparatuses and systems for sensing a logical state of a non-volatile memory cell and non-volatile memory devices produced accordingly
Granted: March 31, 2015
Patent Number:
8995201
Disclose is a non-volatile memory (NVM) cell sensing circuit. The sensing circuit may include a sense-side-line conditioning circuit segment adapted to condition a sense-side-line of the NVM cell. Conditioning may include adjusting a charge density within the NVM cell sense-side-line during a first NVM cell current sensing phase. The conditioning circuit segment may also be adapted to maintain an NVM cell current sensing condition during a second NVM cell current sensing phase. Adjusting…
Semiconductor device with ONO film
Granted: March 31, 2015
Patent Number:
8994093
A semiconductor device includes bit lines provided in a semiconductor substrate; an ONO film that is provided along the surface of the semiconductor substrate and is made of a tunnel oxide film, a trap layer, and a top oxide film; and an oxide film that is provided on the surface of the semiconductor substrate in the middle between the bit lines and contacts the side face of the ONO film, in which the film thickness of the oxide film is larger than the sum of the thicknesses of the…
Apparatus and method for read preamble disable
Granted: March 24, 2015
Patent Number:
8990605
A memory device is provided. The memory device includes a preamble disable memory and a memory controller. The preamble disable memory is arranged to store preamble disable data. The preamble disable data includes an indication as to whether a read preamble should be enabled or disabled. In response to a read command, if the preamble disable data includes an indication that the read preamble should be enabled, the memory controller provides the read preamble. Alternatively, in response…
Control circuit for power supply including a detection circuit and a regulation circuit for regulating switching timing
Granted: March 24, 2015
Patent Number:
8988052
A control circuit for controlling a power supply including a first switch and a second switch coupled in series between a first potential and a second potential. The control circuit includes a detection circuit that detects a magnitude relation of a voltage value at a node between the first and second switches and a reference value during a period in which the first switch and the second switch are inactivated. The detection circuit generates a control signal corresponding to the…
Methods for fabricating memory cells having fin structures with semicircular top surfaces and rounded top corners and edges
Granted: March 24, 2015
Patent Number:
8987092
Methods for fabricating a FIN structure with a semicircular top surface and rounded top surface corners and edges are disclosed. As a part of a disclosed method, a FIN structure is formed in a semiconductor substrate. The FIN structure includes a top surface having corners and edges. The FIN structure is annealed where the annealing causes the top surface to have a semicircular shape and the top surface corners and edges to be rounded.
Fractured erase system and method
Granted: March 17, 2015
Patent Number:
8984238
Efficient and convenient storage systems and methods are presented. In one embodiment, a fractured erase process is performed in which a pre-program process, erase process and soft program process are initiated independently. Memory cells can be pre-programmed and conditioned independent of an erase command. The initiation of the independent pre-programming is partitioned from an erase command which is partitioned from initiation of a soft-programming command. A cell is erased wherein…
Apparatus and method for smart VCC trip point design for testability
Granted: March 17, 2015
Patent Number:
8981823
An apparatus and method for testing is provided. An integrated circuit includes a comparison circuit that is arranged to trip based on a power supply signal reaching a trip point. The integrated circuit also includes an analog-to-digital converter that is arranged to convert the power supply signal into a digital signal. The integrated circuit also includes a storage component that stores a digital value associated with the digital signal, and provides the power supply value at an output…
Contact configuration for undertaking tests on circuit board
Granted: March 17, 2015
Patent Number:
8979550
An electronic structure (for example a reliability board or a cycling control module) has a body including a body portion insertable into a connector. A plurality of contact structures are provided on a side of the body portion, each contact structure comprising a first contact and a second contact spaced from the first contact, with the first and second contacts of each contact structure being aligned in the direction of insertion of the body portion into the connector. A corresponding…
Forming charge trap separation in a flash memory semiconductor device
Granted: March 10, 2015
Patent Number:
8975185
During formation of a charge trap separation in a semiconductor device, a polymer deposition is formed in a reactor using a first chemistry. In a following step, a second chemistry can be used to etch the polymer deposition in the reactor. The same or similar second chemistry can be used in a second etching step to expose a first oxide layer in each of the cells of the semiconductor device and to form a flat upper surface. This additional etch step can also be performed by the reactor,…
Data refresh in non-volatile memory
Granted: March 3, 2015
Patent Number:
8972652
A method of reducing read errors in a non-volatile memory device that result from bit-line or word-line disturb conditions generated by erase operations includes selecting a subset of a memory array for refresh after each erase operation. A pointer to the refresh target section is updated as part of the method to direct the refresh operation to the appropriate subset of the memory array. Refresh may be performed subsequent to an erase operation or concurrently therewith. By distributing…
Processor system optimization
Granted: March 3, 2015
Patent Number:
8972795
In order to enable the optimization of a processor system without relying upon knowhow or manual labor, an apparatus includes: information obtainment unit for reading, from memory, trace information of the processor system and performance information corresponding to the trace information; information analysis unit for analyzing the trace information and the performance information so as to obtain a performance factor such as an idle time, a processing completion time of a task, or the…
