Ultratech Patent Grants

Formation of heteroepitaxial layers with rapid thermal processing to remove lattice dislocations

Granted: September 19, 2017
Patent Number: 9768016
Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable…

Method of lining an oil well pipe in situ

Granted: September 5, 2017
Patent Number: 9752420
A method of lining a metal oil well pipe in situ, by providing a pipe liner composed of a polymer tube having a fabric or mesh reinforcing layer mechanically bonded to its exterior, inserting the pipe liner into the oil well pipe by adding water or other weighting means into the pipe liner, and opening the pipe liner to allow oil to flow therethrough, thereby expanding the pipe liner composite tightly against the oil well pipe.

High-efficiency line-forming optical systems and methods for defect annealing and dopant activation

Granted: July 18, 2017
Patent Number: 9711361
High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line…

Formation of heteroepitaxial layers with rapid thermal processing to remove lattice dislocations

Granted: June 27, 2017
Patent Number: 9691613
Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable…

Method and apparatus for forming device quality gallium nitride layers on silicon substrates

Granted: May 30, 2017
Patent Number: 9666432
Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably selected to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layers after deposition by ALD. In preferred embodiments a silicon substrate is overlaid with an AIN nucleation layer and laser annealed. Thereafter a GaN device layers is applied over the AIN layer…

High-efficiency line-forming optical systems and methods

Granted: May 2, 2017
Patent Number: 9638922
A line-forming optical system and method are disclosed that form a line image with high-efficiency. A method includes forming a laser beam having a first intensity profile with a Gaussian distribution in at least a first direction and passing at least 50% of the laser beam in the first direction to form a first transmitted light. The method also includes: focusing the first transmitted light at an intermediate image plane to define a second intensity profile having a central peak and…

Masking methods for ALD processes for electrode-based devices

Granted: April 25, 2017
Patent Number: 9633850
Masking methods for atomic-layer-deposition processes for electrode-based devices are disclosed, wherein solder is used as a masking material. The methods include exposing electrical contact members of an electrical device having an active device region and a barrier layer formed by atomic layer deposition. This includes depositing solder elements on the electrical contact members, then forming the barrier layer using atomic layer deposition, wherein the barrier layer covers the active…

High-efficiency line-forming optical systems and methods for defect annealing and dopant activation

Granted: April 4, 2017
Patent Number: 9613815
High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line…

Method of laser annealing a semiconductor wafer with localized control of ambient oxygen

Granted: April 4, 2017
Patent Number: 9613828
Laser annealing of a semiconductor wafers using a forming gas for localized control of ambient oxygen gas to reduce the amount of oxidization during laser annealing is disclosed. The forming gas includes hydrogen gas and an inert buffer gas such as nitrogen gas. The localized heating of the oxygen gas and the forming gas in the vicinity of the annealing location on the surface of the semiconductor wafer creates a localized region within which combustion of oxygen gas and hydrogen gas…

Storm water catch basin hazardous liquid valve

Granted: March 28, 2017
Patent Number: 9605422
A storm water catch basin hazardous liquid valve that is automatically responsive to the presence of hazardous liquids in storm water run-off, the valve utilizing a hydrophobic barrier member to separate hazardous liquids from water. Collection of a sufficient amount of hazardous liquids across the hydrophobic barrier member initiates a float release member to seal off the catch basin. In the neutral or non-activated status, the storm water run-off enters the catch basin, passes through…

Oxygen radical enhanced atomic-layer deposition using ozone plasma

Granted: February 28, 2017
Patent Number: 9583337
A method of performing an oxygen radical enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor chamber is disclosed. The method includes forming an ozone plasma to generate oxygen radicals O*. The method also includes feeding the oxygen radicals and a precursor gas sequentially into the interior of the reactor chamber to form an oxide film on the substrate surface. A system for performing the oxygen radical enhanced atomic-layer…

Method for high-velocity and atmospheric-pressure atomic layer deposition with substrate and coating head separation distance in the millimeter range

Granted: February 14, 2017
Patent Number: 9567670
An ALD coating method to provide a coating surface on a substrate is provided. The ALD coating method comprises: providing a deposition heading including a unit cell having a first precursor nozzle assembly and a second precursor nozzle assembly; emitting a first precursor from the first precursor nozzle assembly into chamber under atmospheric conditions in a direction substantially normal to the coating surface; emitting a second precursor from the first precursor nozzle assembly into…

Vapor deposition systems and methods

Granted: January 31, 2017
Patent Number: 9556519
Vapor deposition systems and methods associated with the same are provided. The systems may be designed to include features that can promote high quality deposition; simplify manufacture, modification and use; as well as, reduce the footprint of the system, amongst other advantages.

Laser annealing systems and methods with ultra-short dwell times

Granted: January 31, 2017
Patent Number: 9558973
Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 ?s to about 100 ?s. These ultra-short dwell times are useful for annealing…

Systems and methods for reducing beam instability in laser annealing

Granted: January 31, 2017
Patent Number: 9559023
Systems and methods for reducing beam instability in laser annealing are disclosed. The method includes: directing a conditioned laser beam through an opening in an aperture using a beam-redirecting element; forming a line image on the surface of the semiconductor wafer by imaging the aperture onto the surface, thereby locally heating the surface to form an annealing temperature distribution; detecting a thermal emission from the locally heated wafer surface; determining the annealing…

Wynne-Dyson optical system with variable magnification

Granted: November 8, 2016
Patent Number: 9488811
A 1× Wynne-Dyson optical system for microlithography having a variable magnification is disclosed. The 1× Wynne-Dyson optical system has first and second prisms, and a positive lens group that includes a split lens having first and second split lens elements that reside adjacent the first and second prisms, respectively. The first and second split lens elements are axially movable to change the magnification by up to about 500 parts per million. An adjustable positive lens group for a…

Non-melt thin-wafer laser thermal annealing methods

Granted: November 8, 2016
Patent Number: 9490128
Methods of annealing a thin semiconductor wafer are disclosed. The methods allow for high-temperature annealing of one side of a thin semiconductor wafer without damaging or overheating heat-sensitive electronic device features that are either on the other side of the wafer or embedded within the wafer. The annealing is performed at a temperature below the melting point of the wafer so that no significant dopant redistribution occurs during the annealing process. The methods can be…

Dual-loop control for laser annealing of semiconductor wafers

Granted: October 25, 2016
Patent Number: 9475150
Systems and methods for performing semiconductor laser annealing using dual loop control are disclosed. The first control loop operates at a first frequency and controls the output of the laser and controls the 1/f laser noise. The second control loop also controls the amount of output power in the laser and operates at second frequency lower than the first frequency. The second control loop measures the thermal emission of the wafer over an area the size of one or more die so that…

Silicon germanium heterojunction bipolar transistor structure and method

Granted: September 20, 2016
Patent Number: 9450069
Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can…

Wynne-Dyson projection lens with reduced susceptibility to UV damage

Granted: September 6, 2016
Patent Number: 9436103
A Wynne-Dyson projection lens for use in an ultraviolet optical lithography system is disclosed, wherein the projection lens is configured to have reduced susceptibility to damage from ultraviolet radiation. The projection lens utilizes lens elements that are made of optical glasses that are resistant to damage from ultraviolet radiation, but that also provide sufficient degrees of freedom to correct aberrations. The glass types used for the lens elements are selected from the group of…