Alpha & Omega Semiconductor Patent Grants

Semiconductor device incorporating epitaxial layer field stop zone

Granted: June 8, 2021
Patent Number: 11031465
A semiconductor device includes a semiconductor body having a base region incorporating a field stop zone where the base region and the field stop zone are both formed using an epitaxial process. Furthermore, the epitaxial layer field stop zone is formed with an enhanced doping profile to realize improved soft-switching performance for the semiconductor device. In some embodiments, the enhanced doping profile formed in the field stop zone includes varying, non-constant doping levels. In…

Bidirectional switch having back to back field effect transistors

Granted: June 8, 2021
Patent Number: 11031390
A bi-directional semiconductor switching device is formed by forming first and second vertical field effect transistors (FETs) formed in tandem from a semiconductor substrate. A source for the first FET is on a first side of the substrate and a source for the second FET is on a second side of the substrate opposite the first side. Gates for both the first and second. FETs are disposed in tandem in a common set of trenches formed a drift region of the semiconductor substrate that is…

Dual-gate trench IGBT with buried floating P-type shield

Granted: May 4, 2021
Patent Number: 10998264
A method of manufacturing an insulated gate bipolar transistor (IGBT) device comprising 1) preparing a semiconductor substrate with an epitaxial layer of a first conductivity type supported on the semiconductor substrate of a second conductivity type; 2) applying a gate trench mask to open a first trench and second trench followed by forming a gate insulation layer to pad the trench and filling the trench with a polysilicon layer to form the first trench gate and the second trench gate;…

Common source land grid array package

Granted: April 27, 2021
Patent Number: 10991680
A semiconductor package comprises a land grid array substrate, a first VDMOSFET, a second VDMOSFET, and a molding encapsulation. The land grid array substrate comprises a first metal layer, a second metal layer, a third metal layer, a plurality of vias, and a resin. A series of drain pads at a bottom surface of the semiconductor package follow a “drain 1, drain 2, drain 1, and drain 2” pattern. A method for fabricating a semiconductor package. The method comprises the steps of…

USB type-C load switch ESD protection

Granted: April 13, 2021
Patent Number: 10978869
A MOSFET and an electrostatic discharge (ESD) protection device on a common chip includes a MOSFET with a source, a gate, and a drain, and an ESD protection device configured to implement a diode function that is biased to prevent current from flowing through the common chip from the source to the drain.

System power monitor

Granted: April 6, 2021
Patent Number: 10969848
A system power monitor circuit and method implemented in a system including multiple power supplies measures and scales the power supply output current value at each power supply as a ratio of the power supply output voltage and a reference voltage. Scaled power supply output current values are combined to provide a single system current signal that is referenced to the same reference voltage value being the system voltage signal. The system power is determined from the system current…

Fast transient response in DC-to-DC converters

Granted: March 23, 2021
Patent Number: 10958170
A computer program product and DC-to-DC converter comprising, an electronic switching device, an inductor coupled to the electronic switching device, a capacitor coupled to the inductor wherein the inductor and capacitor are chosen such that the resistance of the load line is greater than a gain minus the equivalent series resistance. A transient controller is communicatively coupled to the electronic switching device, wherein the transient controller has adaptive voltage positioning and…

Voltage regulator with piecewise linear loadlines

Granted: March 16, 2021
Patent Number: 10948934
Apparatus and associated methods relate to providing a piecewise loadline having a number of segments with different slopes and selecting a segment of the piecewise loadline based on an output current of a power supply. In an illustrative example, the piecewise loadline may include a segment that has a negative slope. When the output current is less than a predetermined threshold, the segment with the negative slope may be selected to improve power efficiency. In some embodiments, the…

Low capacitance bidirectional transient voltage suppressor

Granted: March 2, 2021
Patent Number: 10937780
A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and…

Combined IGBT and superjunction MOSFET device with tuned switching speed

Granted: February 23, 2021
Patent Number: 10931276
An apparatus comprising an insulated gate bipolar transistor; and a super-junction metal-oxide semiconductor field effect transistor wherein the insulated gate bipolar transistor wherein the super-junction metal-oxide semiconductor field effect transistor are structurally coupled and wherein the super-junction metal-oxide semiconductor field effect transistor is configured to switch to an ‘on’ state from an ‘off’ state and an ‘off’ state from an ‘on’ state.

Switching regulator controller dynamic output voltage adjustment

Granted: February 16, 2021
Patent Number: 10924014
A controller for a switching regulator includes an error amplifier configured to receive a feedback voltage indicative of the regulated output voltage and a reference voltage, and to generate an error signal indicative of the difference between the feedback voltage and the reference voltage; a loop calculator configured to generate an output signal in response to the error signal, the output signal being used by the switching regulator to generate the regulated output voltage having a…

Voltage-controlled oscillator for current mode hysteretic modulator

Granted: February 16, 2021
Patent Number: 10924013
A voltage-controlled oscillator (VCO) generates a clock signal in response to an input feedback signal by applying tuning to a control loop error signal related to the input feedback signal and generating the clock signal using a voltage ramp signal that is ground referenced. The VCO includes an input tuning circuit applying tuning to a difference signal to generate a tuned voltage signal, a comparator to compare the tuned voltage signal to the ground-based ramp signal, an one-shot…

Device structure and manufacturing method using HDP deposited source-body implant block

Granted: January 19, 2021
Patent Number: 10896968
This invention discloses a semiconductor power device. The trenched semiconductor power device includes a trenched gate, opened from a top surface of a semiconductor substrate, surrounded by a source region encompassed in a body region near the top surface above a drain region disposed on a bottom surface of a substrate. The semiconductor power device further includes an implanting-ion block disposed above the top surface on a mesa area next to the body region having a thickness…

Slope compensation for peak current mode control modulator

Granted: November 10, 2020
Patent Number: 10833661
A ramp signal generator generates a slope compensated ramp signal with optimal slope compensation for a current mode control modulator. In some embodiments, the ramp signal generator generates a ramp signal for the current control loop having a first ramp portion with slope compensation and a second ramp portion that matches the expected current mode signal. In some embodiments, the ramp signal generator is implemented using a switched capacitor circuit with charge scaling to generate…

System and method for extending the maximum duty cycle of a step-down switching converter without maximum duty control

Granted: November 10, 2020
Patent Number: 10833586
The invention proposes a system and method for extending the maximum duty cycle of a step-down switching converter to nearly 100% while maintaining a constant switching frequency. The system includes a voltage mode or current mode step-down converter driven by a leading edge blanking (LEB) signal, which operates at the desired switching frequency. More particularly, the LEB signal is connected to a slope generator and/or a current sensing network. In each switching cycle, the LEB signal…

OR-fet body brake in phase redundant scheme

Granted: November 10, 2020
Patent Number: 10833577
A method, system and computer program product for improving inductor current ramp down times in a DC-to-DC converter having an inductor conductively coupled to a low side transistor on a first side and an or-ing transistor coupled to a second side, where the DC-to-DC converter is in a phase redundant power supply. The method comprises turning off the low side transistor and turning off the or-ing transistor in response to an unloading transient.

Method for precisely aligning backside pattern to frontside pattern of a semiconductor wafer

Granted: November 10, 2020
Patent Number: 10833021
A method comprises the steps of providing a semiconductor device wafer; forming a first plurality of alignment marks on a first side of the semiconductor device wafer; forming a first pattern of a first conductivity type; forming a second plurality of alignment marks on a second side of the semiconductor device wafer; forming a bonded wafer by bonding a carrier wafer to the semiconductor device wafer; forming a third plurality of alignment marks on a free side of the carrier wafer;…

Temperature and Vcompensation for current sensing using Rin MOSFETS

Granted: November 10, 2020
Patent Number: 10830799
A power MOSFET Rdson compensation device comprising analog circuitry receives an input signal proportional to a voltage drop across a power MOSFET, one or more base reference voltages, a voltage-dependent reference voltage, and a temperature-dependent reference voltage. The analog circuitry is configured to produce an output current corresponding to the input signal with compensation for voltage and temperature variation of a drain-source on resistance of the power MOSFET.

Low capacitance transient voltage suppressor including a punch-through silicon controlled rectifier as low-side steering diode

Granted: November 3, 2020
Patent Number: 10825805
A transient voltage suppressor (TVS) device uses a punch-through silicon controlled rectifier (SCR) structure for the high-side steering diode and/or the low-side steering diode where the punch-through SCR structure realizes low capacitance at the protected node. In some embodiments, the breakdown voltage of the TVS device is tailored by connecting two or more forward biased diodes in series. The low capacitance TVS device can be configured for unidirectional or bidirectional…

Silicon carbide MOSFET with source ballasting

Granted: October 27, 2020
Patent Number: 10818662
An integrated device and a method for making said integrated device. The integrated device includes a plurality of planar MOSFETs that have a first contact region formed in a first source region of a plurality of source regions and a second contact region formed in a second source region of the plurality of source regions. The first and second contact regions have respective portions of the source region doped with the second conductivity type, and the first and second contact regions…