METHOD AND APPARATUS FOR TESTING THE FUNCTIONALITY OF A PAGE DECODER
Granted: October 16, 2008
Application Number:
20080253207
A method and apparatus for testing correct operation of a page decoder in a memory is provided. In one implementation, the method includes erasing the memory to reset all memory cells associated with each of the N pages in the memory, and iteratively generating a unique bit sequence of M bits and programming the unique bit sequence into a plurality of the N pages at a given time until each of the N pages contains a unique bit sequence relative to other pages in the memory. Responsive to…
APPARATUS AND METHOD TO MANAGE EXTERNAL VOLTAGE FOR SEMICONDUCTOR MEMORY TESTING WITH SERIAL INTERFACE
Granted: October 9, 2008
Application Number:
20080246504
A serial-interface flash memory device includes a data/address I/O pin and a clock input pin. A bidirectional buffer is coupled to the data/address I/O pin. A serial interface logic block including data direction control is coupled to the clock pin, the bidirectional buffer, to internal control logic, and to read-voltage and modify-voltage generators. A first switch is coupled to the read-voltage generator and the clock buffer and a second switch is coupled to the modify-voltage…
DISPLAY CONTROLLER BLINKING MODE CIRCUITRY FOR LCD PANEL OF TWISTED NEMATIC TYPE
Granted: October 9, 2008
Application Number:
20080246746
A display controller for providing signals to a discrete display panel unit comprising: a set of registers configured to hold data to be displayed; a first logic circuitry connected to the set of registers and configured to receive the data from the set of registers, generate the signal waveforms required by the display panel according to the data, and provide the signal waveforms to the display panel; a second logic circuitry connected to the first logic circuitry, the second logic…
FLEXIBLE, LOW COST APPARATUS AND METHOD TO INTRODUCE AND CHECK ALGORITHM MODIFICATIONS IN A NON-VOLATILE MEMORY
Granted: October 9, 2008
Application Number:
20080250191
A flash memory includes input/output buffers, a memory array having memory cells coupled to the input/output buffers, and row and column decoders, and a voltage-generator circuit coupled to the row and column decoders. A microcontroller is coupled to the command user interface. Switch-instruction circuitry selectively provides instructions to the microcontroller from the read-only memory and from off chip through on-board t-latches coupled to the input/output buffers under control of a…
ARCHITECTURE FOR CONFIGURABLE BUS ARBITRATION IN MULTIBUS SYSTEMS WITH CUSTOMIZABLE MASTER AND SLAVE CIRCUITS
Granted: October 2, 2008
Application Number:
20080244131
An integrated multibus system includes a first and second master devices coupled to first and second master busses. A slave device is coupled to the first and second master busses through a first multiplexer, a first address decoder coupled to the first master bus having an output associated with the slave device, a second address decoder coupled to the second master bus and having an output associated with the slave device. A first arbiter circuit multiplexer has an output coupled to a…
Methods and Apparatus to Detect Voltage Class of a Circuit
Granted: October 2, 2008
Application Number:
20080244279
A method including monitoring whether an externally originating signal reaches a predetermined threshold value in a host, producing an output value based on the monitoring, and identifying a power environment for the host based on the output value is described. Also described is a method for determining the power environment of a host. Systems and hosts for implementing the methods are also described.
NAND-LIKE MEMORY ARRAY EMPLOYING HIGH-DENSITY NOR-LIKE MEMORY DEVICES
Granted: September 25, 2008
Application Number:
20080232169
A flash memory integrated circuit includes a plurality of flash memory arrays. A global word line driver is associated with each array, each global word line driver coupled to a plurality of select lines. A plurality of sense amplifiers are individually coupled to a plurality of bit lines. A plurality of sub arrays in each array each include a plurality of NAND flash memory cells coupled to local word lines and local bit lines. A local word line driver is associated with each sub-array…
POLYSILICON CONDUCTIVITY IMPROVEMENT IN A SALICIDE PROCESS TECHNOLOGY
Granted: September 25, 2008
Application Number:
20080233703
An electronic device and method for forming same. The electronic device includes a source and drain region. Each region has an uppermost portion comprised of a first silicide where the first silicide is overlaid with a first dielectric layer. The electronic device further includes a gate region having an uppermost portion comprised of a second silicide. The second silicide is both thicker than the first silicide and has a lower resistivity than the first silicide with at least a portion…
CHINESE REMAINDER THEOREM - BASED COMPUTATION METHOD FOR CRYPTOSYSTEMS
Granted: September 18, 2008
Application Number:
20080226064
A computer hardware implemented cryptography method computes a modular exponentiation, M:=Cd (mod p·q) upon a message data value C using a Chinese Remainder Theorem (CRT) based technique. To secure against cryptanalysis,, the private key moduli p and q are transformed by multiplication with a generated random value s, so that p?:=p·s and q?:=q·s. The CRT steps of the modular exponentiation are applied using the transformed moduli p? and q? to obtain a random intermediate message data…
INCREMENTAL RECOGNITION
Granted: September 18, 2008
Application Number:
20080226135
Biometric data can be received from a biometric sensor responsive to a physical characteristic stimulus occurring during a sensing event. An incremental recognition process on the biometric data received can be executed prior to the termination of the sensing event.
SEMICONDUCTOR UV ABSORPTIVE PHOTOMETRIC CELLS
Granted: September 11, 2008
Application Number:
20080218755
Biomolecules in solid or liquid form are targeted with a UV beam of about 260 nm that is attenuated by absorption in the biomolecules. The attenuated light passes through a UV transmissive window and partly discharges an underlying floating gate EPROM device. The incremental partial discharge of the floating gate device alters the threshold voltage of the device and is read by an analog output amplifier. Variation in threshold voltage of the device is measured with respect to the extent…
SENSOR MANUFACTURE WITH DATA STORAGE
Granted: September 11, 2008
Application Number:
20080220557
A biometric sensing device includes a sensor manufacture for sensing a biometric stimulus. The sensor manufacture is also configured to persistently store data electronically, such as security data.
SENSOR MONITORING
Granted: September 11, 2008
Application Number:
20080219520
State data in a sensor device is generated based on data that defines sensor operating states. The state data is monitored to determine if the sensor device is operating in a predetermined operating state.
Comparator Chain Offset Reduction
Granted: September 4, 2008
Application Number:
20080211702
Comparator chain total offset, static and dynamic, is reduced by injecting a compensation quantity in at least one point in the chain of comparator components. The compensation quantity is determined by providing the comparator chain with calibration signals having equal values and evaluating the output states of the comparator chain. The compensation quantity is adjusted until the probabilities of high and low output states are substantially equal and a calibrated value for the…
SOFT TRANSITION FROM CONSTANT-CURRENT TO A CONSTANT-VOLTAGE MODE IN A BATTERY CHARGER
Granted: August 28, 2008
Application Number:
20080203974
A system and method for charging a battery. In one embodiment, the system includes a charging circuit that charges the battery with a constant current during a first phase and charges the battery with a constant voltage during a second phase. The system also includes a control circuit for minimizing glitches when the charging transitions from the first phase to the second phase. According to the system and method disclosed herein, a battery may be charges in a controlled and reliable…
Circuit arrangement for generating a temperature-compensated voltage or current reference value
Granted: August 21, 2008
Application Number:
20080197912
A circuit arrangement for generating a temperature-compensated voltage or current reference value (UREF) from a supply voltage (VCC) based on the bandgap principle comprises a PTAT circuit (201) for generating a PTAT signal (I1) proportional to the absolute temperature, a CTAT circuit (202) for generating a CTAT signal (UBE) inversely proportional to the absolute temperature, whereby for generating the temperature-compensated reference value (UREF), the PTAT signal (UBE) and the CTAT…
SYSTEM AND METHOD FOR MONITORING A PROCESS
Granted: August 21, 2008
Application Number:
20080201088
A system and method for monitoring a process. The system includes a processing chamber for receiving a workpiece, a processor coupled to the processing chamber, and at least one surface acoustic wave (SAW) device coupled to the workpiece, and wherein the processor utilizes the at least one SAW device to determine the conditions of the workpiece during processing. According to the method and system disclosed herein, the present invention provides inexpensive, accurate, and abundant…
EMBEDDED ARCHITECTURE WITH SERIAL INTERFACE FOR TESTING FLASH MEMORIES
Granted: August 21, 2008
Application Number:
20080201623
A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test pattern; read the array and compare the results with expected results to identify errors; determine whether the errors can be repaired by substituting a redundant row or column of the…
SINGLE ENDED SENSE AMPLIFIER FOR VERY LOW VOLTAGE APPLICATIONS
Granted: August 14, 2008
Application Number:
20080192555
A sense amplifier has a transimpedance amplifier capable of producing an output voltage level proportionate to a current variation sensed going into a bitline. A transconductance device is configured to produce varying bitline current in response to the transimpedance amplifier output voltage. The transconductance device is capable of utilizing the transimpedance amplifier output voltage as feedback to produce a bitline clamp voltage level. The transimpedance amplifier configured to…
METHOD FOR THE AT LEAST TEMPORARY ACTIVATION OF BIDIRECTIONAL COMMUNICATION AND TRANSPONDER
Granted: August 7, 2008
Application Number:
20080186144
A method for the at least temporary activation of bidirectional communication between a transponder having a nonvolatile memory area and a base station, whereby the transponder in an at least partial mute state receives messages, but no information-related data from the nonvolatile memory area are transmitted and for activation a data stream is transmitted to the transponder by the base station, wherein the data stream for a transmission is linked with a symmetric password, the enable…
