Method, system, and computer program product for characterizing an electronic circuit using model order reduction-based envelope fourier techniques
Patent Number 12141233 - November 12, 2024
Disclosed are methods, systems, and articles of manufacture for characterizing an electronic design with an MOR-based envelope Fourier…
Queue circuit for controlling access to a memory circuit
Patent Number 12141474 - November 12, 2024
A queue circuit that manages access to a memory circuit in a computer system includes multiple sets of entries for storing access requests.…
Method, product, and system for universal verification methodology (UVM) sequence selection using machine learning
Patent Number 12141512 - November 12, 2024
An approach is disclosed herein to sequence selection in a UVM environment. Generally, this approach includes a training phase for each…
Method and system for tracing and identifying target signals by cross-correlation to a signal pattern for a circuit
Patent Number 12141514 - November 12, 2024
Implementations can include a system to trace and identify target signals by cross-correlation to a signal pattern for a circuit, the system…
Extended-burst write training
Patent Number 12119080 - October 15, 2024
A control component transmits a timing strobe and associated write data burst to a memory component, extending the write data burst to include…
EFFICIENT DELAY CALCULATIONS IN REPLICATED DESIGNS
Application Number 20240143877 - May 2, 2024
Disclosed is an improved approach to implement sharing of delay calculations for replicated portions of a design, where input slews may be…
METHOD AND SYSTEM TO FACILITATE REVIEW OF SCHEMATICS FOR AN ELECTRONIC DESIGN
Application Number 20240005081 - January 4, 2024
Disclosed is a method and system for visualizing schematic changes for an electronic design, where multiple schematic view interfaces are…
METHOD AND APPARATUS FOR DETERMINING WAIVER APPLICABILITY CONDITIONS AND APPLYING THE CONDITIONS TO MULTIPLE ERRORS OR WARNINGS IN PHYSICAL VERIFICATION TOOLS
Application Number 20200143100 - May 7, 2020
An approach is described for determining waiver applicability conditions and applying the conditions to multiple errors or warnings in…
Systems And Methods For Binding Mismatched Schematic And Layout Design Hierarchy
Application Number 20170124235 - May 4, 2017
Disclosed herein are systems and methods that allow a layout editor function, presented in a graphical user interface, of an EDA, to indicate…
SYSTEM AND METHOD FOR IMPLEMENTING AND VALIDATING STAR ROUTING FOR POWER CONNECTIONS AT CHIP LEVEL
Application Number 20160210393 - July 21, 2016
A system, method, and computer program product for automating the design and routing of non-shared one-to-many conductive pathways between a…
Arcadia Beauty Labs LLC et al v. Cadence Design Systems, Inc.
California Central District Court - November 14, 2024
Cadence Design Systems, Inc. v. Intelligent Automation (Zhuhai) Co., Ltd.
California Northern District Court - October 7, 2024
Semiconductor Design Technologies, LLC v. Cadence Design Systems, Inc.
U.S. Court of Appeals, Federal Circuit - July 1, 2024
Cadence Design Systems, Inc. v. Applebaum
California Northern District Court - January 17, 2024
Cadence Design Systems, Inc. v. Fenda USA Inc. et al
California Northern District Court - November 15, 2023
Cadence Design Systems, Inc. v. Syntronic AB et al
California Northern District Court - September 12, 2022
ORDER DENYING STAY AND CONCONCURRING WITH MAGISTRATE JUDGE SPERO'S PRIOR ORDERS denying 166 Motion to Stay; denying 167 Motion. …
Cadence Design Systems, Inc. v. Syntronic AB et al
California Northern District Court - August 16, 2022
ORDER declining to impose sanctions pursuant to 174 order to show cause. Signed by Chief Magistrate Judge Joseph C. Spero on August 16,…
Cadence Design Systems, Inc. v. Syntronic AB et al
California Northern District Court - May 3, 2022
ORDER DENYING MOTION TO STRIKE AFFIRMATIVE DEFENSES denying 95 Motion to Strike 95 MOTION to Strike 90 Amended Answer to…
Cadence Design Systems, Inc. v. Syntronic AB et al
California Northern District Court - April 5, 2022
Order by Chief Magistrate Judge Joseph C. Spero granting 99 Administrative Motion to File Under Seal. (jcslc2, COURT STAFF) (Filed on…
Cadence Design Systems, Inc. v. Syntronic AB et al
California Northern District Court - December 13, 2021
ORDER GRANTING MOTION TO STRIKE DEFENDANTS' AFFIRMATIVE DEFENSES 61 (Illston, Susan) (Filed on 12/13/2021)
SEMICONDUCTOR DESIGN TECHNOLOGIES, LLC v. CADENCE DESIGN SYSTEMS, INC.
United States US Court of Appeals, Federal Circuit - July 19, 2024
Cadence Design Systems, Inc. v. Syntronic AB et al
California California Northern District Court - May 3, 2022
ORDER DENYING MOTION TO STRIKE AFFIRMATIVE DEFENSES denying 95 Motion to Strike 95 MOTION to Strike 90 Amended Answer to Complaint, 91 Amended…
Cadence Design Systems, Inc. v. Syntronic AB et al
California California Northern District Court - September 16, 2021
ORDER GRANTING PLAINTIFF'S MOTION FOR ALTERNATIVE SERVICE, AND DENYING DEFENDANTS' MOTION TO QUASH AND MOTION TO DISMISS FIRST…
CADENCE DESIGN SYSTEMS, INC. V. ROGER VIERA
United States US Court of Appeals, Ninth Circuit - November 20, 2020
SEMICONDUCTOR DESIGN TECHNOLOGIES, LLC v. CADENCE DESIGN SYSTEMS, INC.
US Court of Appeals for the Federal Circuit - July 19, 2024
CADENCE DESIGN SYSTEMS, INC. V. ROGER VIERA
US Court of Appeals for the Ninth Circuit - November 20, 2020
