Cadence Design Systems Profile

Cadence Design Systems Patent Grants

Optimizing a power grid for an integrated circuit

Patent Number 10242145 - March 26, 2019

The present embodiments relate generally to creating power grids for complex integrated circuits having many power domains, macros, and…

Optimizing core wrappers in an integrated circuit

Patent Number 10234504 - March 19, 2019

According to certain aspects, the present embodiments relate to optimizing core wrappers in an integrated circuit to facilitate core-based…

Exhaustive input vector stimuli for signal electromigration analysis

Patent Number 10235482 - March 19, 2019

A method for obtaining a partition netlist from a partition of an integrated circuit netlist and identifying a logic path from an input to an…

Methods and systems for centering of pins during instance abutment

Patent Number 10235490 - March 19, 2019

Disclosed herein are embodiments of systems, methods, and products using a center access direction for pin figures during an abutment of…

Multiphase clock generation and interpolation with clock edge skew correction

Patent Number 10237052 - March 19, 2019

Systems and methods disclosed herein provide for effectively eliminating the rotational and static phase skews between the in-phase (I) and…

Cadence Design Systems Patent Applications

Systems And Methods For Binding Mismatched Schematic And Layout Design Hierarchy

Application Number 20170124235 - May 4, 2017

Disclosed herein are systems and methods that allow a layout editor function, presented in a graphical user interface, of an EDA, to indicate…

SYSTEM AND METHOD FOR IMPLEMENTING AND VALIDATING STAR ROUTING FOR POWER CONNECTIONS AT CHIP LEVEL

Application Number 20160210393 - July 21, 2016

A system, method, and computer program product for automating the design and routing of non-shared one-to-many conductive pathways between a…

METHODS, SYSTEMS, AND ARTICLES OF MANUFACTURE FOR IMPLEMENTING HIGH CURRENT CARRYING INTERCONNECTS IN ELECTRONIC DESIGNS

Application Number 20160070841 - March 10, 2016

Various embodiments implement additional connectivity for electronic designs by identifying one or more regions for a route in normal…

METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR SCHEMATIC DRIVEN, UNIFIED THERMAL AND ELECTROMAGNETIC INTERFERENCE COMPLIANCE ANALYSES FOR ELECTRONIC CIRCUIT DESIGNS

Application Number 20160063171 - March 3, 2016

Disclosed are methods and systems for by identifying or generating an electrical schematic, generating a thermal schematic by associating…

DEBUGGING SESSION HANDOVER

Application Number 20140281730 - September 18, 2014

A method includes, during operation of a software debugging tool on a software program, and upon indication by a first user of the software…

Cadence Design Systems Federal District Court Decisions

Cadence Design Systems, Inc. v. Pounce Consulting, Inc.

California Northern District Court - January 30, 2019

ORDER RE ENTRY OF DEFAULT. Signed by Judge Phyllis J. Hamilton on 1/30/2019. (pjhlc2S, COURT STAFF) (Filed on 1/30/2019)

Cadence Design Systems, Inc. v. Pounce Consulting, Inc.

California Northern District Court - December 14, 2018

ORDER RE MOTION TO WITHDRAW AS COUNSEL by Judge Phyllis J. Hamilton. (pjhlc2S, COURT STAFF) (Filed on 12/14/2018)

Cadence Design Systems, Inc. v. Pounce Consulting, Inc.

California Northern District Court - December 13, 2018

ORDER re 194 STIPULATION WITH PROPOSED ORDER re Document Production filed by Cadence Design Systems, Inc. Signed by Judge Elizabeth…

Cadence Design Systems, Inc. v. Pounce Consulting, Inc. et al

California Central District Court - October 22, 2018

ORDER GRANTING PLAINTIFF CADENCE DESIGN SYSTEMS, INC.'S UNOPPOSED MOTION TO COMPEL (ECF 1 , 12 ) by Magistrate Judge Steve Kim. This…

Cadence Design Systems, Inc. v. Pounce Consulting, Inc.

California Northern District Court - June 15, 2018

ORDER RE MOTION TO WITHDRAW AS COUNSEL AND CASE SCHEDULE by Judge Phyllis J. Hamilton. (pjhlc2, COURT STAFF) (Filed on 6/15/2018)