System and method for testing integrated circuits
Granted: July 11, 2002
Application Number:
20020091979
A method of testing an integrated circuit including component blocks of random logic in a manufacturing environment is disclosed. The method includes the steps of performing built-in self tests, at least in part to test memory and data paths of the integrated circuit, performing diagnostics tests, at least in part to test the component blocks of random logic individually, performing stress tests using test vectors, at least in part to test the component blocks of random logic…
Block based design methodology with programmable components
Granted: June 13, 2002
Application Number:
20020073380
A method for designing a circuit block includes the steps of selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, at least one of said circuit blocks being programmable; collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method; accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and…
System and method for software code optimization
Granted: May 30, 2002
Application Number:
20020066088
A method is provided of optimizing a software program for a target processor in order to meet specific performance objectives and yet maintain portability, where the software program is initially coded in a high-level language. The method includes a first step of optimizing the software program in the high-level language, using optimizations that are substantially independent of the target processor to host the application. Preferably, if the performance objectives are met after the…
System and method for a circuit component interface
Granted: February 7, 2002
Application Number:
20020016706
Systems and methods for designing integrated circuits and for creating and using androgynous interfaces between electronic components of integrated circuits are disclosed. One preferred method of designing an integrated circuit includes several steps. In one step, a foundation block for the integrated circuit is specified, including specifying the locations of multiple androgynous interfaces in the integrated circuit. In another step, one or more component blocks to comprise the…
Block based design methodology
Granted: February 7, 2002
Application Number:
20020016952
A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming…
Block based design methodology
Granted: November 15, 2001
Application Number:
20010042237
A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming…
Block based design methodology
Granted: November 8, 2001
Application Number:
20010039641
A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming…
Device level layout optimization in electronic design automation
Granted: October 25, 2001
Application Number:
20010034873
According to a custom physical design process for integrated circuits, a method is provided for creating layouts characterized by optimal-length chains for different types of MOS circuit designs, including mixed-signal MOS designs. A chaining engine having a device library and operating on a computer converts a circuit representation such as a netlist file into a layout file characterized by optimal-length chains. Such conversion may be accomplished in linear time. From a circuit…
System and method for H-Tree clocking layout
Granted: September 27, 2001
Application Number:
20010025368
A technique for constructing a balanced H-Tree clock layout suited for application to clock signals in integrated circuits, but applicable to other signals requiring balanced distribution over a wide area, involves routing clock wires in a circuit design wherein internal circuit blocks are divided, to the extent possible, into groups having an equal number of circuit blocks. An upper H-Tree clock layout structure is established using the center of mass of each of the circuit block groups…
Block based design methodology
Granted: September 27, 2001
Application Number:
20010025369
A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming…
Block based design methodology
Granted: August 30, 2001
Application Number:
20010018756
A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming…
Block based design methodology
Granted: August 23, 2001
Application Number:
20010016933
A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming…
