Method of splitting a packet into individual layers for modification and intelligently stitching layers back together after modification and an apparatus thereof
Granted: December 27, 2016
Patent Number:
9531849
Embodiments of the apparatus for modifying packet headers relate to pointer structure for splitting a packet into individual layers and for intelligently stitching them back together. The pointer structure includes N+1 layer pointers to N+1 protocol headers. The pointer structure also includes a total size of all headers. A rewrite engine uses the layer pointers to extract the first N corresponding protocol layers within the packet for modification. The rewrite engine uses the layer…
Method of using generic modification instructions to enable flexible modifications of packets and an apparatus thereof
Granted: December 27, 2016
Patent Number:
9531848
Embodiments of the apparatus for modifying packet headers relate to programmable modifications of packets by applying commands to generalized protocol headers. Each protocol header of incoming packets is represented in a generic format specific to that protocol to enable modifications to packet headers. Missing fields from a protocol header are detected, and the protocol header is expanded to a maximum size such that the protocol header contains all possible fields of that protocol,…
Phased bucket pre-fetch in a network processor
Granted: December 27, 2016
Patent Number:
9531723
A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. Each of the lookup engines receives a key request associated with a packet and determines a subset of the rules to match against the packet data. Based on a prefetch status, a selection of the subset of rules are…
Method and apparatus for managing processing thread migration between clusters within a processor
Granted: December 27, 2016
Patent Number:
9531690
A method, and corresponding apparatus, of managing processing thread migrations within a plurality of memory clusters, includes embedding, in memory components of the plurality of memory clusters, instructions indicative of processing thread migrations; storing, in one or more memory components of a particular memory cluster among the plurality of memory clusters, data configured to designate the particular memory cluster as a sink memory cluster, the sink memory cluster preventing an…
Multi-host processing
Granted: December 27, 2016
Patent Number:
9531647
A packet processor provides for rule matching of packets in a network architecture. The packet processor includes a lookup cluster complex having a number of lookup engines and respective on-chip memory units. The on-chip memory stores rules for matching against packet data. A lookup front-end receives lookup requests from multiple hosts, manages traffic among the hosts, and processes these lookup requests to generate key requests for forwarding to the lookup engines. As a result of the…
Systems and methods for enabling access to extensible remote storage over a network as local storage via a logical storage controller
Granted: December 27, 2016
Patent Number:
9529773
A new approach is proposed that contemplates systems and methods to support elastic (extensible/flexible) storage access in real time by mapping a plurality of remote storage devices that are accessible over a network fabric as logical namespace(s) via a logical storage controller using a multitude of access mechanisms and storage network protocols. The logical storage controller exports and presents the remote storage devices to one or more VMs running on a host of the logical storage…
Method and apparatus for assigning resources used to manage transport operations between clusters within a processor
Granted: December 20, 2016
Patent Number:
9525630
A method, and corresponding apparatus, of assigning processing resources used to manage transport operations between a first memory cluster and one or more other memory clusters, include receiving information indicative of allocation of a subset of processing resources in each of the one or more other memory clusters to the first memory cluster, storing, in the first memory cluster, the information indicative of resources allocated to the first memory cluster, and facilitating management…
Floating mask generation for network packet flow
Granted: December 6, 2016
Patent Number:
9513926
A tag mask generation method comprises receiving a section_selector flag indicating whether a tag mask for a section of a network packet is to be generated; receiving from a parser a parse information for the network packet, wherein the parse information includes a section_pointer that indicates a location of the section in the network packet; generating a pointer based on the section_pointer when the section_selector indicates that the tag mask for the section is to be generated;…
Method of extracting data from packets and an apparatus thereof
Granted: December 6, 2016
Patent Number:
9516145
Embodiments of the apparatus for extracting data from packets relate to programmable layer commands that allow fields from packets to be extracted. A packet is split into individual layers. Each layer is given a unique layer type number that identifies the layer. Based on the layer type, each layer is expanded to a generic format. Each layer has a set of layer commands that is generic to that layer. Fields of each layer command are fieldOffset and fieldLen. These layer commands allow…
Anchored patterns
Granted: December 6, 2016
Patent Number:
9514246
A method and apparatus relate to recognizing anchored patterns from an input stream. Patterns from a plurality of given patterns are marked as anchored patterns. An anchored state tree for the anchored patterns of the plurality of given patterns is built, including nodes representing a state of the anchored state tree. For each node of the anchored state tree, a failure value equivalent to a node representing a state in an unanchored state tree representing unanchored patterns of the…
Method and apparatus for handling modified constellation mapping using a soft demapper
Granted: November 29, 2016
Patent Number:
9509362
A transceiver processing hardware (“TPH”) configured to process wireless bit stream(s) includes a minimum mean square error (“MMSE”), an inverse discrete Fourier transform (“IDFT”), a demapper, a descrambler, and a combiner. While MMSE estimates transmit the bit stream, IDFT generates samples associated with the frequency of the bit stream. The demapper, in one embodiment, is configured to discard one or more unused constellation points relating to the frequency of bit stream…
System and method to traverse a non-deterministic finite automata (NFA) graph generated for regular expression patterns with advanced features
Granted: November 29, 2016
Patent Number:
9507563
In one embodiment, a method of walking a non-deterministic finite automata (NFA) graph representing a pattern includes extracting a node type and an element from a node of the NFA graph. The method further includes matching a segment of a payload for the element by matching the payload for the element at least zero times, the number of times based on the node type.
Dynamically adjusting supply voltage based on monitored chip temperature
Granted: November 29, 2016
Patent Number:
9507369
In an embodiment, a method includes monitoring a temperature of a semiconductor chip and adjusting a supply voltage to the semiconductor chip based on the monitored temperature. The temperature may be monitored by a temperature sensor located on-chip or off-chip. Adjusting the supply voltage includes increasing the supply voltage as a function of the monitored temperature decreasing. The increase to the supply voltage occurs only if the monitored temperature is below a threshold…
Testbench builder, system, device and method including a generic monitor and transporter
Granted: November 29, 2016
Patent Number:
9506982
A testbench for testing a device under test (DUT), wherein the testbench has a verification environment including a reference model, a scoreboard and a customized agent for each interface that the DUT needs to receive input from and/or transmit output on. The testbench system is able to be generated by a testbench builder that automatically creates a scoreboard, a reference model, a dispatcher and generic agents including generic drivers, loopback ports, sequencers and/or generic…
Method and apparatus for quantizing soft information using non-linear LLR quantization
Granted: November 22, 2016
Patent Number:
9503218
A process capable of employing compression and decompression mechanism to receive and decode soft information is disclosed. Upon receiving a set of signals representing a logic value from a transmitter via a physical communication channel, the set of signals is demodulated in accordance with a soft decoding scheme and subsequently, a Log Likelihood Ratio (“LLR”) value representing the logic value is generated. After generating a quantized LLR value in response to the LLR value via a…
Managing skew in data signals with multiple modes
Granted: November 22, 2016
Patent Number:
9502099
A method for controlling a memory includes causing a data de-skewer to operate in a writing mode, at the data de-skewer, receiving a first signal, and skewing the first data signal by a first compensation skew, causing the data de-skewer to operate in a reading mode, at the data de-skewer, receiving a second signal, and skewing the second signal by a second compensation skew, wherein the first signal is representative of a bit from a byte that is to be written to the memory, and wherein…
Translation lookaside buffer management
Granted: November 22, 2016
Patent Number:
9501425
Each of multiple translation lookaside buffers (TLBs) is associated with a corresponding processing element. A first TLB invalidation (TLBI) instruction is issued at a first processing element, and sent to a second processing element. An element-specific synchronization instruction is issued at the first processing element. A synchronization command is broadcast, and received at the second processing element. The element-specific synchronization instruction prevents issuance of…
Systems and methods for NVMe controller virtualization to support multiple virtual machines running on a host
Granted: November 22, 2016
Patent Number:
9501245
A new approach is proposed that contemplates systems and methods to virtualize a physical NVMe controller associated with a computing device or host so that every virtual machine running on the host can have its own dedicated virtual NVMe controller. First, a plurality of virtual NVMe controllers are created on a single physical NVMe controller, which is associated with one or more storage devices. Once created, the plurality of virtual NVMe controllers are provided to VMs running on the…
Method and apparatus for supporting wide operations using atomic sequences
Granted: November 22, 2016
Patent Number:
9501243
Implementations of wide atomic sequences are achieved by augmenting a load operation designed to initiate an atomic sequence and augmenting a conditional storing operation that typically terminates the atomic sequence. The augmented load operation is designed to further allocate a memory buffer besides initiating the atomic sequence. The conditional storing operation is augmented to check the allocated memory buffer for any data stored therein. If one or more data words are detected in…
QoS based dynamic execution engine selection
Granted: November 15, 2016
Patent Number:
9495161
In one embodiment, a processor includes plural processing cores, and plural instruction stores, each instruction store storing at least one instruction, each instruction having a corresponding group number, each instruction store having a unique identifier. The processor also includes a group execution matrix having a plurality of group execution masks and a store execution matrix comprising a plurality of store execution masks. The processor further includes a core selection unit that,…
