Ratio-Metric Self-Capacitance-to-Code Convertor
Granted: March 22, 2018
Application Number:
20180083650
A circuit, system, and method for converting self capacitance to a digital value may include a pair of charge transfer circuits, each including a switch network, a sensor capacitor or modulation capacitor, and an integration capacitor may be coupled to a comparator to produce a data signal representative of the capacitance of the sensor capacitor of one of the charge transfer circuits. The data signal may be used to indicate a capacitance value of the self capacitance through conversion…
Method of ONO Stack Formation
Granted: March 22, 2018
Application Number:
20180083024
A method of controlling the thickness of gate oxides in an integrated CMOS process which includes performing a two-step gate oxidation process to concurrently oxidize and therefore consume at least a first portion of the cap layer of the NV gate stack to form a blocking oxide and form a gate oxide of at least one metal-oxide-semiconductor (MOS) transistor in the second region, wherein the gate oxide of the at least one MOS transistor is formed during both a first oxidation step and a…
SYSTEMS, METHODS, AND APPARATUS FOR MEMORY CELLS WITH COMMON SOURCE LINES
Granted: March 22, 2018
Application Number:
20180082746
A method for operating a memory device includes the steps of providing a first voltage to a first transistor of a first memory cell and a third transistor of a second memory cell, providing a second voltage to a gate of a second transistor of the first memory cell and a gate of a fourth transistor of the second memory cell, and providing a third voltage to a gate of the first transistor of the first memory cell and a gate of the third transistor of the second memory cell. Other…
SYSTEM FOR RE-ENUMERATION OF USB 3.0 COMPATIBLE PERIPHERAL DEVICES
Granted: March 22, 2018
Application Number:
20180081697
Described herein is a system comprising a peripheral device that is connected to a host device over a bus compatible with USB 3.0. The host device comprises a reduced functionality USB host controller configured to perform a set of one or more preprogrammed functions from the USB 3.0 specification, and a universal asynchronous receiver and transmitter (UART) configured to sample USB response data received from the peripheral device over the bus.
Method to Reduce Program Disturbs in Non-Volatile Memory Cells
Granted: March 8, 2018
Application Number:
20180068735
A non-volatile memory that includes a shared source line configuration and methods of operating the same to reduce disturbs is provided. In one embodiment, the method includes coupling a first positive high voltage to a first global wordline in a first row of an array of memory cells, and coupling a second negative high voltage (VNEG) to a first bitline in a first column of the array to apply a bias to a non-volatile memory transistor in a selected memory cell to program the selected…
SONOS Stack With Split Nitride Memory Layer
Granted: February 22, 2018
Application Number:
20180053657
A semiconductor device and method of manufacturing the same are provided. In one embodiment, method includes forming a first oxide layer over a substrate, forming a silicon-rich, oxygen-rich, oxynitride layer on the first oxide layer, forming a silicon-rich, nitrogen-rich, and oxygen-lean nitride layer over the oxynitride layer, and forming a second oxide layer on the nitride layer. Generally, the nitride layer includes a majority of charge traps distributed in the oxynitride layer and…
NON-FINGER OBJECT REJECTION FOR FINGERPRINT SENSORS
Granted: January 25, 2018
Application Number:
20180025199
A method for detecting a finger at a fingerprint sensor includes detecting a presence of an object at a fingerprint sensor and, in response to detecting the presence of the object, acquiring image data for the object based on signals from the fingerprint sensor. The method further includes, for each subset of one or more subsets of the image data, calculating a magnitude value for a spatial frequency of the subset, and identifying the object as a finger based on comparing the magnitude…
FINGERPRINT SENSOR PATTERN
Granted: January 11, 2018
Application Number:
20180012055
An example system drives one or more transmit signals on first electrodes disposed in a first layer and propagating electrodes disposed in a second layer. The system measures a capacitance of sensors through a of second electrodes. Each second electrode crosses each first electrode to provide a plurality of discrete sensor areas, each discrete sensor area associated with a difference crossing and including a portion of at least one propagating electrode. Each second electrode is…
RE-ENUMERATION OF USB 3.0 COMPATIBLE DEVICES
Granted: January 11, 2018
Application Number:
20180011718
A host device can download a firmware update to a peripheral device having previously enumerated with the host device. The host device can perform link training with the peripheral device in response to a re-enumeration indication received from the peripheral device. The link training can include switching a Link Training and Status State Machine (LTSSM) in the host device from an active state (U0) to an RX.Detect state and synchronizing with the peripheral device in the RX.Detect state.…
VARIED SILICON RICHNESS SILICON NITRIDE FORMATION
Granted: January 4, 2018
Application Number:
20180006132
A method to fabricate a non-planar memory device including forming a multi-layer silicon nitride structure substantially perpendicular to a top surface of the substrate. There may be multiple non-stoichiometric silicon nitride layers, each including a different or same silicon richness value from one another.
DETECT AND DIFFERENTIATE TOUCHES FROM DIFFERENT SIZE CONDUCTIVE OBJECTS ON A CAPACITIVE BUTTON
Granted: January 4, 2018
Application Number:
20180003752
Apparatuses and methods of distinguishing between a finger and stylus proximate to a touch surface are described. One apparatus includes a first circuit to obtain capacitance measurements of sense elements when a conductive object is proximate to a touch surface. The apparatus also includes a second circuit coupled to the first circuit. The second circuit is operable to detect whether the conductive object activates the first sense element, second sense element, or both, in view of the…
INTEGRATED CIRCUIT INCLUDING PARAMETRIC ANALOG ELEMENTS
Granted: December 28, 2017
Application Number:
20170371992
A design system is provided. In one embodiment the design system includes an input module to receive specification data for a designed circuit including a configurable integrated circuit (IC). The configurable IC includes a number of analog elements for which parameters can be set by the design system, and a plurality of configurable signal path elements including an analog-to-digital converter (ADC) that is utilized in a plurality of different signal paths. The design system further…
BUS SHARING SCHEME
Granted: December 28, 2017
Application Number:
20170371824
A programmable device, having an analog component coupled with an analog bus and a digital component coupled with a digital bus together with a set of 10 pads, each of which capable of being coupled to a bus line of one segment of the analog bus as well as to at least one digital bus line, and where the analog bus is capable of being used to connect a pair of the pads to each other.
PROVIDING A BASELINE CAPACITANCE FOR A CAPACITANCE SENSING CHANNEL
Granted: December 28, 2017
Application Number:
20170371451
A capacitance-sensing circuit may include a channel input associated with measuring a capacitance of a unit cell of a capacitive sense array. The capacitance-sensing circuit may also include a capacitive hardware baseliner that is coupled to the channel input. The capacitive hardware baseliner includes a programmable baseline resistor, and a buffer with an input coupled to the programmable baseline resistor and an output coupled to the channel input. The capacitive hardware baseliner…
HIGH VOLTAGE ARCHITECTURE FOR NON-VOLATILE MEMORY
Granted: December 21, 2017
Application Number:
20170365346
A method of erasing, during an erase operation, a non-volatile memory (NVM) cell of a memory device is disclosed. The erasing includes applying a first HV signal (VPOS) to a common source line (CSL). The CSL is shared among NVM cells of a sector of NVM cells. The first HV signal is above a highest voltage of a power supply. The erasing also includes applying the first HV signal to a local bit line (BL).
Methods and Devices For Reading Data From Non-Volatile Memory Cells
Granted: December 21, 2017
Application Number:
20170365300
Disclosed is a method for responding to a single user read command of a complementary cell array including one or more complementary cell pairs, the method including: determining if a first group of cells out of a data word is in an erased state or in a programmed state, and outputting a data word so that (a) if the first group of cells is determined to be erased a logical “one” is output for each bit of the data word and (b) if the first group of cells is determined to be programmed…
NONVOLATILE CHARGE TRAP MEMORY DEVICE HAVING A DEUTERATED LAYER IN A MULTI-LAYER CHARGE-TRAPPING REGION
Granted: December 7, 2017
Application Number:
20170352732
A memory is described. Generally, the memory includes a number of non-planar multigate transistors, each including a channel of semiconducting material overlying a surface of a substrate and electrically connecting a source and a drain, a tunnel dielectric layer overlying the channel on at least three sides thereof, and a multi-layer charge-trapping region overlying the tunnel dielectric layer. In one embodiment, the multi-layer charge-trapping region includes a first deuterated layer…
Methods and Sensors for MultiPhase Scanning in the Fingerprint and Touch Applications
Granted: December 7, 2017
Application Number:
20170351897
Techniques for multi-phase scanning based on pseudo-random sequences in capacitive fingerprint applications are described herein. In an example embodiment, a method performed by a processing device comprises: receiving measurements that are representative of a portion of a finger on a capacitive fingerprint sensor array, where the measurements are obtained from sensor elements of the capacitive fingerprint sensor array that are scanned in a multi-phase mode based on an excitation vector…
CONFIGURABLE AND POWER-OPTIMIZED INTEGRATED GATE-DRIVER FOR USB POWER-DELIVERY AND TYPE-C SOCS
Granted: December 7, 2017
Application Number:
20170351320
Techniques for power Field Effect Transistor (power-FET) gate drivers are described herein. In an example embodiment, a USB-enabled system comprises a first and second power paths and an IC controller coupled to control the first and second power paths, where the first and second power paths are external to the IC controller and the IC controller is configured to operate both an N-channel power-FET in the first power path and a P-channel power-FET in the second power path.
Dynamically Reconfigurable Analog Routing and Multiplexing Architecture on a System on a Chip
Granted: October 5, 2017
Application Number:
20170286344
An integrated circuit device may include a reconfigurable analog signal switching fabric comprising a plurality of global buses that are selectively connected to external pins by pin connection circuits in response to changeable analog routing data, and a plurality of local buses that are selectively connected to analog blocks and/or global buses by routing connection circuits in response to the analog routing data; and at least one processor circuit that executes predetermined…
