Register clock driver for DDR5 memory
Granted: September 3, 2019
Patent Number:
10401899
A register clock driver for a DDR5 memory is presented. A register clock driver (RCD) can include a logic having one or more input channels, each of the one or more input channels receiving input signals; and a plurality of ranked output ports associated with each of the one or more input channels, the logic providing the input signals received on each of the one or more input channels to the associated plurality of ranked output ports according to control signals. The RCD can operate in…
Surface mapping of inductive physical profile of wireless power products
Granted: September 3, 2019
Patent Number:
10401443
A system for mapping magnetic fields around a transmission coil is presented. The method includes selecting a selected induction loop from an array of selectable induction loops arranged adjacent the transmission coil, detecting current from the selected induction loop, the current being generated by a magnetic field from a transmission coil, to obtain measured values; and comparing measured values with expected values.
Method to build asymmetrical transmit/receive switch with 90 degrees impedance transformation section
Granted: August 27, 2019
Patent Number:
10396467
An apparatus includes an impedance matching network, a first switch circuit, and a second switch circuit. The impedance matching network generally comprises a first port, a second port, and a third port. The first switch circuit may be coupled between the first port and a circuit ground potential. The second switch circuit may be coupled between the second port and the circuit ground potential. The impedance matching network generally provides a first impedance value for the first port…
Enhanced data buffer and intelligent NV controller for simultaneous DRAM and flash memory access
Granted: August 27, 2019
Patent Number:
10394460
Operation of an Enhanced Data Buffer and Intelligent NV Controller for Simultaneous DRAM and Flash Memory Access has been disclosed. In one implementation a host can operate at full DRAM speed to a DIMM having thereon a NV Controller, DRAM, and flash memory.
Circuits and systems for wideband quadrature signal generation
Granted: August 20, 2019
Patent Number:
10389572
Wide band quadrature signal generation includes a frequency synthesizer generating a LO or 2×LO signal, a polyphase filter coupled to receive the LO signal and generate first in-phase and quadrature LO signals, a 2:1 frequency divider coupled to receive the 2×LO signal and generate second in-phase and quadrature LO signals, and a LO signal selector for selecting either the first or second in-phase LO signals as an output in-phase LO signal and either the first or second quadrature LO…
High speed, low power, isolated buffer
Granted: August 20, 2019
Patent Number:
10389343
Methods and apparatuses have been disclosed for a high speed, low power, isolated buffer having architecture and operation that control current flow to minimize coupling and power consumption. Buffer architecture may include one or more of BiCMOS components, an input disabling circuit operated to additionally disable an input circuit when it is also disabled by a selection circuit and a buffer disabling circuit operated to disable the buffer when the input circuit is disabled by the…
Apparatuses and methods for performing information extraction and insertion on bitstreams
Granted: August 13, 2019
Patent Number:
10382793
Examples of methods and apparatus for performing wavefront parallel decode of video bitstreams are described herein. An example apparatus includes a CABAC decoder configured to decode a CABAC bitstream and generate an output bitstream. The output bitstream contains a plurality of NAL units, each NAL unit being associated with a respective row of a macroblock. The apparatus includes an extractor block configured to extract entry point information associated with a row, and a memory…
BICMOS-based transceiver for millimeter wave frequency applications
Granted: August 13, 2019
Patent Number:
10382083
An e-band transceiver includes a transmitter circuit and a receiver circuit. The transmitter circuit includes a surface mounted technology (SMT) module on which is mounted a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier. The receiver circuit of the e-band…
Method to improve power amplifier output return loss and back-off performance with RC feedback network
Granted: August 13, 2019
Patent Number:
10381746
An apparatus includes a phased array antenna panel and one or more beam former circuits mounted on the phased antenna array panel. The phased array antenna panel generally comprises a plurality of antenna elements arranged in one or more groups. Each of the one or more beam former circuits may be coupled to a respective group of the antenna elements. Each of the one or more beam former circuits may comprise a plurality of transceiver channels. Each transceiver channel generally comprises…
Methods of estimating frequency skew in networks using timestamped packets
Granted: August 6, 2019
Patent Number:
10374786
Methods of estimating frequency skew in a packet network include determining a representation of a packet delay variation (PDV) sequence from an initial estimate of frequency skew between master and slave devices in the packet network and timestamps transmitted therebetween. An operation is performed to extract a statistical mode from an empirical probability distribution function (PDF) of the representation of the PDV sequence, where the statistical mode corresponds to a value at which…
Method and apparatus for novel adaptive equalization technique for serializer/deserializer links
Granted: July 30, 2019
Patent Number:
10367662
A method and apparatus for a novel adaptive equalization technique for a Serializer/Deserializer receiver is disclosed. In one approach, adjustment of AC and DC gains is performed before DFE coefficients are adjusted. Further after the equalization an electrical idle threshold may be set based on the results of the equalization.
Fast-response references-less frequency detector
Granted: July 30, 2019
Patent Number:
10367494
An apparatus includes a first circuit and a second circuit. The first circuit may be configured to generate a waveform in response to a frequency of an input clock signal and a threshold frequency. The second circuit may be configured to generate a control signal in response to a type of the waveform. The type of the waveform may comprise at least one of pulses and a steady state. The control signal may have a first state when the type of the waveform is the pulses and a second state…
Standing and resonant wave clocking in DDR RCD and data buffer
Granted: July 23, 2019
Patent Number:
10360970
An apparatus includes a plurality of termination points and a clock mesh network. The termination points may be configured to send/receive timing signals. Each of the termination points may comprise an inductor. The clock mesh network may be configured to provide a path to transmit the timing signals from a clock source to a plurality of components and implement a condition using the inductors. The inductors for each of the termination points may be implemented to meet the condition.…
Circuits and systems for low power magnetic secure transmission
Granted: July 23, 2019
Patent Number:
10360485
According to another embodiment, a system includes a driver circuit that drives a first output and a second output; a coil coupled between the first output and the second output such that the driver circuit drives current through the coil in response to control signals; and a programmable slew circuit coupled to the driver circuit. In some embodiments, a switch is coupled between the first output and the coil. In some embodiments an over-voltage protection circuit is coupled to protect…
Methods and apparatuses for multi-pass adaptive quantization
Granted: July 16, 2019
Patent Number:
10356405
A video encoding method for encoding a stream of baseband video data. The stream of baseband video data is received as a plurality of coding units. Statistics of each coding unit in the plurality of coding units are gathered. A quantization parameter (QP) for each coding unit is determined from the corresponding statistics. The coding unit is trial encoded using the QP to generate a trial encoded coding unit; and the QP is updated based on the trial encoded coding unit. Trial encoding…
Hitless re-arrangements in coupled digital phase-locked loops
Granted: July 16, 2019
Patent Number:
10355699
An apparatus comprising an accumulator circuit and an offset register. The accumulator circuit may be configured to (a) receive a plurality of frequency offset values from a plurality of sourcing DPLLs and (b) generate a current combined offset value in response to a sum of the frequency offset values. The offset register may be configured to (a) store an offset value corresponding to the current combined offset value in a first mode and (b) store an offset value corresponding to an…
Apparatus, system, and method for back-channel communication in an inductive wireless power transfer system
Granted: July 16, 2019
Patent Number:
10355525
An inductive wireless power transfer device comprises a transmitter that comprises a transmit coil configured to generate a wireless power signal to a coupling region in response to an input voltage, and a modulator configured to modulate the wireless power signal and encode data with the wireless power signal to establish a back-channel communication link from the transmitter to a receiver. An inductive wireless power receiving device comprises a receiver that comprises a receive coil…
Apparatuses, methods, and content distribution system for transcoding bitstreams using first and second transcoders
Granted: July 2, 2019
Patent Number:
10341673
Examples of systems, apparatuses, and methods for to transcoding a bitstream are described herein. An example content distribution system may include an interconnect configured to provide encoded video data from an encoder to a decoder. The interconnect is configured to receive a bitstream including the encoded video data from the encoder. The bitstream is encoded using a first lossless coding methodology. The interconnect including a transcoder configured to transcode the bitstream…
High frequency wireless power rectifier startup circuit design
Granted: July 2, 2019
Patent Number:
10340786
A rectifier circuit can include a plurality of FETs arranged as a rectifier; and a start-up circuit applied to each of the plurality of FETs that turn each of the FETs off during a circuit startup period, wherein the start-up circuit provides a large impedance for low power dissipation during normal operation of the rectifier.
Flexible point-to-point memory topology
Granted: June 18, 2019
Patent Number:
10325637
An apparatus includes a plurality of memory devices and a control circuit. The control circuit may be configured to enable a plurality of access modes for the plurality of memory devices. In a one-channel mode, all of the memory devices are accessed using a single selectable channel. In a two-channel mode, a first portion of the plurality of memory devices is accessed using a first channel and a second portion of the plurality of memory devices is accessed using a second channel.
