INTEGRATED CIRCUIT DEVICES WITH SELF-ALIGNED VIA-TO-JUMPER CONNECTIONS
Granted: May 1, 2025
Application Number:
20250142948
An IC device with one or more transistors may also include one or more vias and jumpers for delivering power to the transistors. For instance, a via may be coupled to a power plane. A jumper may be connected to the via and an electrode of a transistor. With the via and jumper, an electrical connection is built between the power plane and the electrode. The via may be self-aligned. The IC device may include a dielectric structure at a first side of the via. A portion of the jumper may be…
DOUBLE-SIDED CONDUCTIVE VIA
Granted: May 1, 2025
Application Number:
20250140748
A fabrication method and associated integrated circuit (IC) structures and devices that include one or more conductive vias is described herein. In one example, a conductive via is formed from one side of the integrated circuit, and then a portion of the conductive via is widened from a second side of the IC structure opposite the first side. In one example, a resulting IC structure includes a first portion having a first width, a second portion having a second width, and a third portion…
PACKAGE ARCHITECTURE WITH THERMAL ENHANCEMENTS FOR VERTICALLY ORIENTED INTEGRATED CIRCUIT DIES
Granted: May 1, 2025
Application Number:
20250140741
Embodiments of a microelectronic assembly comprise: a first set comprising one or more of first integrated circuit (IC) dies; a second set comprising another one or more of the first IC dies; a plate between, and in direct contact with, the first set and the second set; and a second IC die coupled to the first set, the second set, and the plate. Each IC die comprises a substrate of semiconductor material and an interconnect region including metallization in interlayer dielectric (ILD),…
INTEGRATED CIRCUIT DEVICES WITH BACKSIDE SEMICONDUCTOR STRUCTURES
Granted: May 1, 2025
Application Number:
20250140649
An IC device may include a semiconductor structure and a backside semiconductor structure over the semiconductor structure. The semiconductor structure and backside semiconductor structure may constitute the source or drain region of a transistor. The backside semiconductor structure may be closer to the backside of a substrate of the IC device than the semiconductor structure. The backside semiconductor structure may be formed at a lower temperature than the semiconductor structure. The…
STATEFUL FLOW TABLE MANAGEMENT USING PROGRAMMABLE NETWORK INTERFACE DEVICES
Granted: May 1, 2025
Application Number:
20250139040
An apparatus includes a host interface; a network interface; hardware storage to store a flow table; and programmable circuitry comprising processors to implement network interface functionality and to: implement a hash table and an age context table, wherein the hash table and the age context table are to reference flow rules maintained in the flow table; process a synchronization packet for a flow by adding a flow rule for the flow to the flow table, adding a hash entry corresponding…
TECHNOLOGIES FOR LOW POWER INDOOR AND OUTDOOR DETECTION
Granted: May 1, 2025
Application Number:
20250138491
Techniques for low power indoor/outdoor detection are disclosed. In the illustrative embodiment, an integrated sensor hub receives data from an accelerometer. The sensor hub processes the accelerometer data to determine an activity of the user. Depending on the activity of the user, the sensor hub may determine whether the compute device is indoors or outdoors or may receive data from additional sensors, such as a magnetometer, a gyroscope, or an ambient light sensor. The additional…
GLASS CORES WITH EMBEDDED POWER DELIVERY COMPONENTS
Granted: April 24, 2025
Application Number:
20250132264
Glass cores with embedded power delivery components are disclosed. An example apparatus includes a glass layer including an opening, a dielectric material within the opening, a first cluster of inductors extending through the dielectric material, and a second cluster of inductors extending through the dielectric material, the second cluster spaced apart from the first cluster, the dielectric material extending continuously from around the first cluster to around the second cluster.
RIBBON OR WIRE TRANSISTOR STACK WITH SELECTIVE DIPOLE THRESHOLD VOLTAGE SHIFTER
Granted: April 24, 2025
Application Number:
20250133822
Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or…
ORTHOGONAL COLD PLATE FOR USE IN ACTIVE LIQUID IMMERSION COOLING
Granted: April 24, 2025
Application Number:
20250133692
A cold plate comprises a plurality of fins. The individual fins have an opening, and the openings collectively define a first channel through the plurality of fins. During operation of an integrated circuit component attached to the cold plate, coolant is pumped through the cold plate. The coolant flows in a first direction through the first channel and then in a second through second channels located between the fins. The first direction is substantially orthogonal to the second…
SERVICE PERIOD BASED PARAMETER UPDATES
Granted: April 24, 2025
Application Number:
20250133495
This disclosure describes systems, methods, and devices related to enhanced service period updates. A device may receive, from a station (STA), a negotiation request that identifies a service period and one or more transmission and reception (Tx/Rx) parameters to be updated during the service period. The device may define the service period based on the received negotiation request, wherein the service period is determined using a target wake time (TWT) element. The device may adjust,…
MICROMETER METAL PARTICLE REINFORCED TIN-BISMUTH LOW TEMPERATURE SOLDER MATERIALS
Granted: April 24, 2025
Application Number:
20250128362
Solder materials and microelectronic devices and systems deploying the solder materials are discussed. The solder material includes a bulk material of tin and bismuth and particles interspersed in the tin and bismuth bulk material. The particles are a metal other than tin and bismuth, and an intermetallic compound is formed around the particles. The intermetallic compound includes the metal of the particles and tin or bismuth. The solder materials are deployed as interconnect structures…
MICROELECTRONIC ASSEMBLIES HAVING TOPSIDE POWER DELIVERY STRUCTURES
Granted: April 24, 2025
Application Number:
20250132259
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source; a first microelectronic component, having an active side electrically coupled to the surface of the package substrate and an opposing back side, surrounded by an insulating material; a second microelectronic component, having an active…
ELECTRICALLY SELF-INSULATED VIA
Granted: April 24, 2025
Application Number:
20250132245
A fabrication method and associated integrated circuit (IC) structures and devices that include one or more self-insulated vias is described herein. In one example, an IC structure includes a via surrounded by an insulator material and a layer of insulator material between a conductive material of the via and the surrounding insulator material. In one example, the layer of insulator material has one or more material properties that are different than the surrounding insulator material,…
POROUS LINERS FOR THROUGH-GLASS VIAS AND ASSOCIATED METHODS
Granted: April 24, 2025
Application Number:
20250132239
Porous liners for through-glass vias and associated methods are disclosed. An example apparatus includes a glass layer having a through-hole. The example apparatus further includes a conductive material within the through-hole. The example apparatus also includes a porous material between at least a portion of the conductive material and at least a portion of a sidewall of the through-hole.
APPARATUS INCLUDING SPEAKERS PORTED THROUGH KEYS OF A KEYBOARD
Granted: April 24, 2025
Application Number:
20250132109
Apparatus including speakers ported through keys of a keyboard are disclosed. An example electronic device includes a housing, and a keyboard carried by the housing. The keyboard includes a key having a keycap that covers an associated switch. The example electronic device further includes a speaker within the housing underneath the keyboard. The keycap includes an opening to define a port through which sound from the speaker is able to pass.
PERSONALIZED SKIN TONE ADAPTATION FOR IMAGES AND VIDEO
Granted: April 24, 2025
Application Number:
20250131704
Systems, apparatus, articles of manufacture, and methods are disclosed to implement personalized skin tone adaptation for images and video. An example apparatus disclosed herein obtains an initial skin tone group distribution for an identified user depicted in an input image. The example apparatus also determines, based on the input image, a plurality of skin tone measurements associated respectfully with a plurality of skin tone groups corresponding to the initial skin tone group…
METHODS AND APPARATUS FOR DYNAMIC BATCHING OF DATA FOR NEURAL NETWORK WORKLOADS
Granted: April 24, 2025
Application Number:
20250131256
Examples to determine a dynamic batch size of a layer are disclosed herein. An example apparatus to determine a dynamic batch size of a layer includes a layer operations controller to determine a layer ratio between a number of operations of a layer and weights of the layer, a comparator to compare the layer ratio to a number of operations per unit of memory size performed by a computation engine, and a batch size determination controller to, when the layer ratio is less than the number…
FRAMEWORK FOR OPTIMIZATION OF MACHINE LEARNING ARCHITECTURES
Granted: April 24, 2025
Application Number:
20250131048
The present disclosure is related to framework for automatically and efficiently finding machine learning (ML) architectures that are optimized to one or more specified performance metrics and/or hardware platforms. This framework provides ML architectures that are applicable to specified ML domains and are optimized for specified hardware platforms in significantly less time than could be done manually and in less time than existing ML model searching techniques. Furthermore, a user…
MEMORY-BASED CROSS-DOMAIN I/O FRAMEWORK
Granted: April 24, 2025
Application Number:
20250130874
A cross-domain device includes a memory with a shared memory region. The device further includes a first interface to couple to a first device over a first interconnect, where the first device implements a first domain, and includes a second interface to couple to a second device over a second interconnect, where the second device implements a second domain, and the first domain is independent of the second domain. The cross-domain device is to create a buffer in the shared memory region…
BARRIER STATE SAVE AND RESTORE FOR PREEMPTION IN A GRAPHICS ENVIRONMENT
Granted: April 24, 2025
Application Number:
20250130848
An apparatus to facilitate barrier state save and restore for preemption in a graphics environment is disclosed. The apparatus includes processing resources to execute a plurality of execution threads that are comprised in a thread group (TG) and mid-thread preemption barrier save and restore hardware circuitry to: initiate an exception handling routine in response to a mid-thread preemption event, the exception handling routine to cause a barrier signaling event to be issued; receive…
