Intel Patent Applications

HEAT SPREADERS WITH INTERLOCKED INSERTS

Granted: March 14, 2019
Application Number: 20190079567
Disclosed herein are embodiments of heat spreaders with interlocked inserts, and related devices and methods. In some embodiments, a heat spreader may include: a frame formed of a first material, wherein the frame includes an opening, a projection of the frame extends into the opening, and the projection has a top surface, a side surface, and a bottom surface; a recess having at least one sidewall formed by the frame; and an insert formed of a second material different from the first…

MULTIPLE INDIRECTION GRANULARITIES FOR MASS STORAGE DEVICES

Granted: March 14, 2019
Application Number: 20190079681
One embodiment provides a memory controller. The memory controller includes logical block address (LBA) section defining logic to define a plurality of LBA sections for a memory device circuitry, each section including a range of LB As, and each section including a unique indirection-unit (IU) granularity; wherein the IU granularity defines a physical region size of the memory device. The LBA section defining logic also to generate a plurality of logical-to-physical (L2P) tables to map a…

FLOATING-POINT ADDER CIRCUITRY WITH SUBNORMAL SUPPORT

Granted: March 14, 2019
Application Number: 20190079728
An integrated circuit may include a floating-point adder. The adder may be implemented using a dual-path adder architecture having a near path and a far path. The near path may include a leading zero anticipator (LZA), a comparison circuit for comparing an exponent value to an LZA count, and associated circuitry for handling subnormal numbers. The far path may include a subtraction circuit for computing the difference between a received exponent value and a minimum exponent value, at…

SCALABLE SPINLOCKS FOR NON-UNIFORM MEMORY ACCESS

Granted: March 14, 2019
Application Number: 20190079807
Techniques are disclosed to provide scalable spinlocks for non-uniform memory access (NUMA). In some examples, a global spinlock configured to protect access to a shareable resource is protected by multiple local spinlocks, which are each configured to control access to the global spinlock. In a multi-socket NUMA system, the global spinlock is allocated on one of the sockets, and the local spinlocks are distributed over the multiple sockets. In some embodiments, one local spinlock is…

DETECTING SILENT DATA CORRUPTION FOR MASS STORAGE DEVICES

Granted: March 14, 2019
Application Number: 20190079827
One embodiment provides a storage controller. The storage controller includes host data segmentation logic to divide, in response to a write command from a host domain to write a data payload to a storage device, the data payload into a plurality of data segments; cyclic redundancy check (CRC) encode logic to generate a CRC code for each data segment; and CRC reordering encode logic to assign each CRC code to another data segment among the plurality of data segments.

FAST CACHE WARM-UP

Granted: March 14, 2019
Application Number: 20190079866
An embodiment of a semiconductor package apparatus may include technology to determine if a memory request for a second level memory results in a miss with respect to a first level memory, determine if a range of the second level memory corresponding to the memory request is unwritten, if the memory request results in the miss with respect to the first level memory, and blank a corresponding range of the first level memory if the range of the second level memory corresponding to the…

ENTROPIC CLASSIFICATION OF OBJECTS

Granted: March 14, 2019
Application Number: 20190080000
There is disclosed in an example a computing apparatus for assigning an entropy score to a document to be added to a corpus in a first temporal state having a first corpus entropy, having one or more logic elements, including at least one hardware logic element, providing a classification engine to: receive the document to be added to the corpus; add the document to the corpus, creating a second temporal state of the corpus; compute a second corpus entropy for the second temporal state,…

CHECKPOINTING DISK CONFIGURATION USING MACHINE LEARNING

Granted: March 14, 2019
Application Number: 20190080257
One embodiment provides a system including processor, a storage device, training logic and runtime prediction logic to develop a model to enable improved checkpointing. The training logic trains the model using simulated or known data to predict a size of a changelog needed for checkpointing. The size of the changelog is correlated to user type and timespan (as a checkpoint tracking changes made over a full week is likely larger than a checkpoint tracking changes made over a single day,…

ADAPTIVE SCHEDULING FOR TASK ASSIGNMENT AMONG HETEROGENEOUS PROCESSOR CORES

Granted: March 14, 2019
Application Number: 20190080429
Generally, this disclosure provides systems, devices, methods and computer readable media for adaptive scheduling of task assignment among heterogeneous processor cores. The system may include any number of CPUs, a graphics processing unit (GPU) and memory configured to store a pool of work items to be shared by the CPUs and GPU. The system may also include a GPU proxy profiling module associated with one of the CPUs to profile execution of a first portion of the work items on the GPU.…

CIRCULAR FISHEYE CAMERA ARRAY RECTIFICATION

Granted: March 14, 2019
Application Number: 20190080430
Techniques related to image rectification for fisheye images are discussed. Such techniques may include iteratively determining warpings for equirectangular images corresponding to the fisheye images using alternating feature mappings between neighboring ones of the equirectangular images until mean vertical disparities between the features are reduced below a threshold, and warping the equirectangular images to rectified equirectangular images.

SYSTEMS AND METHODS FOR AUGMENTED REALITY PREPARATION, PROCESSING, AND APPLICATION

Granted: March 14, 2019
Application Number: 20190080516
Various of the disclosed embodiments provide systems and methods for acquiring and applying a depth determination of an environment in e.g., various augmented reality applications. A user may passively or actively scan a device (e.g., a tablet device, a mobile phone device, etc.) about the environment acquiring depth data for various regions. The system may integrate these scans into an internal three-dimensional model. This model may then be used in conjunction with subsequent data…

SIMULTANEOUS MULTI-USER AUDIO SIGNAL RECOGNITION AND PROCESSING FOR FAR FIELD AUDIO

Granted: March 14, 2019
Application Number: 20190080692
A mechanism is described for facilitating simultaneous recognition and processing of multiple speeches from multiple users according to one embodiment. A method of embodiments, as described herein, includes facilitating a first microphone to detect a first speech from a first speaker, and a second microphone to detect a second speech from a second speaker. The method may further include facilitating a first beam-former to receive and process the first speech, and a second beam-former to…

TECHNIQUES FOR FORMING LOGIC INCLUDING INTEGRATED SPIN-TRANSFER TORQUE MAGNETORESISTIVE RANDOM-ACCESS MEMORY

Granted: March 14, 2019
Application Number: 20190081233
Techniques are disclosed for forming a logic device including integrated spin-transfer torque magnetoresistive random-access memory (STT-MRAM). In accordance with some embodiments, one or more magnetic tunnel junction (MTJ) devices may be formed within a given back-end-of-line (BEOL) interconnect layer of a host logic device. A given MTJ device may be formed, in accordance with some embodiments, over an electrically conductive layer configured to serve as a pedestal layer for the MTJ's…

CLOCK SYNCHRONIZATION APPARATUS AND METHOD

Granted: March 14, 2019
Application Number: 20190081630
Described is an apparatus for clock synchronization. The apparatus comprises a pair of interconnects; a first die including a first phase interpolator having an output coupled to one of the interconnects; and a second die, wherein the pair of interconnects is to couple the first die to the second die.

HIGH-SPEED ANALOG-TO-DIGITAL CONVERTER

Granted: March 14, 2019
Application Number: 20190081635
There is disclosed in one example a communication apparatus, including: an analog data source; a digital communication interface; and an analog-to-digital converter (ADC) circuit assembly, including: an analog sample input; an input clock to provide frequency fin; a time-interleaved front end to interleave n samples of the analog sample input; and an ADC array including n successive-approximation register (SAR) ADCs, the SAR ADCs including self-clocked comparators and configured to…

FAULTY WORD LINE AND FAULTY BIT LINE INFORMATION IN ERROR CORRECTING CODING

Granted: March 14, 2019
Application Number: 20190081640
One embodiment provides a memory controller. The memory controller includes a memory controller control circuitry, a defect map logic and an error correction circuitry. The memory controller circuitry is to read a codeword from a memory device. The defect map logic is to identify a respective word line (WL) and a respective bit line (BL) for each bit in the codeword based, at least in part, on a memory device map and to determine whether any identified WL and/or any identified BL is…

MULTIMODE WAVEGUIDE

Granted: March 14, 2019
Application Number: 20190081705
There is disclosed in one example a communication apparatus, including: a local data interface; a data encoder to encode a transmission into n millimeter to terahertz-band transmission components, wherein n?2, each transmission component having an independent mode of each other transmission component; and a plurality of n launchers to launch the transmission components onto n closely-bundled waveguides, wherein the closely-bundled waveguides are not shielded from one another.

ENHANCED SOUNDING REFERENCE SIGNALING FOR UPLINK BEAM TRACKING

Granted: March 14, 2019
Application Number: 20190081751
Apparatus, systems, and methods to implement enhanced sounding reference signaling for uplink (UL) beam tracking in communication systems are described. In one example, an apparatus of an evolved Node B (eNB) comprising processing circuitry to broadcast system information about one or more sets of uplink transmit time intervals and bandwidths available for a sounding reference signal (SRS) transmission from a first user equipment (UE), configure one or more UE-specific SRS processes for…

TECHNIQUES FOR PERFORMING MULTIPLE-INPUT AND MULTIPLE-OUTPUT TRAINING USING A BEAM REFINEMENT PACKET

Granted: March 14, 2019
Application Number: 20190081819
Various embodiments are generally directed to an apparatus, method and other techniques to perform beamforming training in a MIMO environment. Some embodiments may include communicating one or more beamforming refinement packets having training subfields with orthogonal structures such that devices may simultaneously perform beamforming training for each pair of phased array antennas. Embodiments may also include the beamforming refinement packets with channel estimation fields with…

VIDEO FEATURE TAGGING

Granted: March 14, 2019
Application Number: 20190082164
An activity recording system is provided. The activity recording system includes a three-dimensional camera, a sensor arrangement that is fitted to a subject being recorded, and an activity recording device. The activity recording device receives image information from the three-dimensional camera and sensor arrangement information from the sensor arrangement. Both the image information and the sensor arrangement information include location measurements. The sensor arrangement…