OPTICAL PROXIMITY SENSORS WITH OFFSET COMPENSATION
Granted: May 16, 2013
Application Number:
20130120761
An optical proximity sensor includes a driver, light detector and offset signal generator. The driver selectively drives a light source. The light detector produces an analog detection signal indicative of an intensity of light detected by the light detector. The detected light can include light transmitted by the light source that reflected off an object within the sense region of the optical sensor, interference light and ambient light. The interference light includes light transmitted…
MIXED FORMAT MEDIA TRANSMISSION SYSTEMS AND METHODS
Granted: May 9, 2013
Application Number:
20130117797
Systems and methods for operating cameras are described. An image signal received from an image sensor can be processed as a plurality of video signals representative of the image signal. An encoder may combine baseband and digital video signals in an output signal for transmission over a cable. The video signals may include substantially isochronous baseband and digital video signals. The baseband video signal can comprise a standard definition analog video signal and the digital video…
CONSTELLATION DETECTION IN A MULTI-MODE QAM COMMUNICATIONS SYSTEM
Granted: May 2, 2013
Application Number:
20130107922
Systems and methods for determining an unknown QPSK or QAM constellation from a set of possible received constellations are described. One method utilizes a histogram of the power of the signal after inter-symbol-interference has been minimized with a modified constant modulus algorithm equalizer. The constellation may be determined before carrier frequency and phase has been fully recovered. An unknown QPSK or QAM constellation may be identified before or after equalization using…
PROJECTOR SYSTEMS WITH LIGHT BEAM ALIGNMENT
Granted: May 2, 2013
Application Number:
20130107133
Embodiments of the present invention generally relate to circuits, systems and methods that can be used to detect light beam misalignment, so that compensation for such misalignment can be performed. In accordance with an embodiment, a circuit includes a photo-detector (PD) having a plurality of electrically isolated PD segments. Additionally, the circuit has circuitry, including switches, configured to control how currents indicative of light detected by the plurality of electrically…
Power Amplifier Linearization Using Cancellation-Based Feed Forward Methods and Systems
Granted: May 2, 2013
Application Number:
20130106509
Linearizers can improve the linearity of power amplifiers by canceling or reducing amplitude of non-linearity components, (e.g., IM3, IM5, IM7, IM9, etc.) generated by the power amplifier. The linearizers can obtain samples of signals output by the power amplifier and process the samples to produce a canceling signal that is applied onto or into an output of the power amplifier. The canceling signal is generated such that when applied to the output of the power amplifier, the canceling…
INDUCTOR STRUCTURE INCLUDING INDUCTORS WITH NEGLIGIBLE MAGNETIC COUPLING THEREBETWEEN
Granted: May 2, 2013
Application Number:
20130106500
An embodiment of an apparatus includes first and second core regions, first and second conductors, and an isolation region. The first core region has a first permeability, and the first conductor is disposed in the first core region. The second core region has a second permeability, and the second conductor is disposed in the second core region. And the isolation region is disposed between the first and second core regions, and has a third permeability that is significantly different…
ELECTROSTATIC DISCHARGE CLAMP WITH CONTROLLED HYSTERESIS INCLUDING SELECTABLE TURN ON AND TURN OFF THRESHOLD VOLTAGES
Granted: April 25, 2013
Application Number:
20130100562
An electrostatic discharge (ESD) clamp for coupling between first and second nodes for providing ESD protection including first and second voltage threshold circuits. The clamp circuit limits operating voltage between the first and second nodes to a maximum level when activated. The first and second voltage threshold circuits each have a selectable threshold voltage, such as by coupling one or more voltage threshold devices in series. The first and second voltage threshold circuits…
SYSTEMS AND METHODS FOR LEAD FRAME LOCKING DESIGN FEATURES
Granted: April 25, 2013
Application Number:
20130099366
Systems and methods for lead frame locking design features are provided. In one embodiment, a method comprises: fabricating a lead frame for a chip package, the lead frame having a paddle comprising a step-out bottom locking feature profile across at least a first segment of an edge of the paddle that provides an interface with a mold compound; etching the paddle to have at least a second segment of the edge having either an extended-step-out bottom locking feature profile or an…
BATTERY CHARGE MODULATOR WITH BOOST CAPABILITY
Granted: April 11, 2013
Application Number:
20130088203
A system and method for controlling a converter of a power stage receiving an adapter current for providing current to a load. The converter is operative in a buck mode for charging a battery and in a boost mode for discharging the battery to the load to supplement adapter current. The adapter current is compared with a predetermined level to develop a control signal, and at least one pulse control signal is developed based on the control signal and used to control the modulator. The…
SYSTEM AND METHOD FOR CURRENT LIMITING A DC-DC CONVERTER
Granted: April 11, 2013
Application Number:
20130088209
A DC-DC voltage converter has a pair of switching transistors to provide an output voltage and are alternately switched in a boost mode of operation responsive to control signals. An inductor is connected to the pair of switching transistor and has an inductor current flowing there through. A current sensor monitors an input current and generates a current sense signal responsive thereto. Control circuitry generates the control signals to the second pair of switching transistors…
VOLTAGE REGULATOR SYSTEM AND METHOD FOR EFFICIENCY OPTIMIZATION USING DUTY CYCLE MEASUREMENTS
Granted: April 4, 2013
Application Number:
20130082670
A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator…
STACKABLE ELECTRONIC COMPONENT
Granted: April 4, 2013
Application Number:
20130081266
An embodiment of an electronic component includes a circuit element disposed within a package, which includes a surface and at least one standoff protruding from the surface. For example, where the circuit element is an inductor in a power supply, the standoff may allow one to mount the inductor component over another component, such as a transistor component. Therefore, the layout area of such a power supply may be smaller than the layout area of a power supply in which the inductor and…
POWER FACTOR CORRECTION APPARATUS AND METHOD
Granted: March 7, 2013
Application Number:
20130057229
The various embodiments may include a power supply having a first loop in communication with a power stage of the power supply. A second loop in communication with the first loop may generate a negative reactance value that increases a power factor for the power supply to approximately one. A power supply may also include a rectifier coupleable to an input supply. A power factor compensation circuit coupled to the rectifier may generate a negative reactance. The negative reactance may…
BACK-TO-BACK STACKED DIES
Granted: February 21, 2013
Application Number:
20130043940
Embodiments disclosed herein provide for a circuit including first die having an active side and a backside, wherein the first die is flip-chip mounted to a carrier. The circuit also includes a second die stacked on the backside of the first die, wherein the second die is stacked on the first die such that a backside of the second die is facing the backside of the first die and an active side of the second die faces away from the first die.
SYSTEM AND METHOD FOR OPERATING A ONE-WIRE PROTOCOL SLAVE IN A TWO-WIRE PROTOCOL BUS ENVIRONMENT
Granted: January 17, 2013
Application Number:
20130019039
A method for transmitting data on a data line of a two-wire bus wherein the bus includes a data line and a clock line includes the step of pulling the data line of the two-wire bus low to define a start condition. Next, a first group of fixed data bits enabling a slave device to determine a clock signal for an address portion of a transmission of data are transmitted between a master device and the slave device. An address of the slave device is transmitted from the master device in a…
LIGHT EMITTING ELEMENT DRIVER IC IMPLEMENTING GAMMA EXPANSION
Granted: January 17, 2013
Application Number:
20130016285
Described herein are light emitting element driver integrated circuits (ICs), methods for use with light emitting element driver ICs, and projector systems that include a light emitting element driver IC. A light emitting element driver IC receives a color data word from the video processor IC. Starting with the color data word received from the video processor IC, the light emitting element driver IC performs a gamma expansion function to thereby produce a gamma expanded digital or…
BOND PAD CONFIGURATIONS FOR SEMICONDUCTOR DIES
Granted: January 17, 2013
Application Number:
20130015592
A semiconductor device is provided and includes a semiconductor die, and a plurality of bond pads having exposed surfaces arranged in an alternating interleaved pattern on the semiconductor die. Each of the surfaces of the bond pads have a first bond placement area that overlaps with a second bond placement area, with the first bond placement area having a major axis that is orthogonal to a major axis of the second bond placement area. A connecting bond is located at an intersection of…
CASCADE BOOST AND INVERTING BUCK CONVERTER WITH INDEPENDENT CONTROL
Granted: December 20, 2012
Application Number:
20120319604
A converter system including a cascade boost converter and inverting buck converter and controller for converting a rectified AC voltage to a DC output current. The system uses inductors and is configured to use a common reference voltage. The controller is configured to control switching of the converters in an independent manner to decouple operation from each other. For example, control pulses for the boost converter may be wider than pulses for the buck converter. The controller may…
CABLE EQUALIZATION AND MONITORING FOR DEGRADATION AND POTENTIAL TAMPERING
Granted: December 13, 2012
Application Number:
20120314130
Provided herein are methods and systems that provide automatic compensation for frequency attenuation of a video signal transmitted over a cable. In accordance with an embodiment, a system includes an equalizer and a compensation controller. The equalizer receives a video signal that was transmitted over a cable, provides compensation for frequency attenuation that occurred during the transmission over the cable, and outputs a compensated video signal. The compensation controller…
OPTICAL SENSOR DEVICES INCLUDING FRONT-END-OF-LINE (FEOL) OPTICAL FILTERS AND METHODS FOR FABRICATING OPTICAL SENSOR DEVICES
Granted: December 13, 2012
Application Number:
20120313201
Optical sensor devices, and methods of manufacturing the same, are described herein. In an embodiment, a monolithic optical sensor device includes a semiconductor substrate having a trench, with a photodetector region under said trench. An optical filter is formed in the trench and over at least a portion of the photodetector region. One or more metal structures extend above a top surface of said optical filter. The trench, photodetector region and optical filter are formed as part of a…
