Double-sided cooling isolated packaged power semiconductor device
Granted: November 11, 2004
Application Number:
20040222515
A power device includes a semiconductor die having an upper surface and a lower surface. One or more terminals are coupled to the die. A first substrate is bonded to the upper surface of the die. The first substrate is configured to provide a first heat dissipation path. A second substrate is bonded to the lower surface of the die. The second substrate is configured to provide a second heat dissipation path.
Power device with bi-directional level shift circuit
Granted: August 12, 2004
Application Number:
20040155692
A gate driver includes a control signal generator having a first input and configured to output a gate control signal to a power semiconductor switch. The gate control signal generator is provided proximate a high side of the gate driver. A first sub-circuit has a first signal path and a second signal path that are suitable for transmitting signals. The first and second signal paths are coupled to the first input of the gate control signal generator. The second signal path is configured…
Shallow trench power MOSFET and IGBT
Granted: July 1, 2004
Application Number:
20040124489
A power semiconductor device includes a substrate having an upper surface and a lower surface. The substrate has a trench. First and second doped regions are provided proximate the upper surface of the substrate. A first source region is provided within the first doped region. A second source region is provided within the second doped region. A gate is provided between the first and second source regions. The gate includes a first portion extending downward into the trench. A depth of…
Breakdown voltage for power devices
Granted: June 24, 2004
Application Number:
20040119087
A power device includes a semiconductor substrate of first conductivity having an upper surface and a lower surface. An isolation diffusion region of second conductivity is provided at a periphery of the substrate and extends from the upper surface to the lower surface of the substrate. The isolation diffusion region has a first surface corresponding to the upper surface of the substrate and a second surface corresponding to the lower surface. A peripheral junction region of second…
Reverse blocking IGBT
Granted: April 1, 2004
Application Number:
20040061170
A method for forming a high voltage insulated gate bipolar transistor (“IGBT”) includes providing a semiconductor substrate of first conductivity type. The semiconductor substrate includes a front-side surface, a backside surface, and a scribe region. The substrate further includes a plurality of active cells on the front-side surface. A drain region of second conductivity type is formed using a first impurity proximate the backside surface of the substrate. A continuous…
Power device and direct aluminum bonded substrate thereof
Granted: January 22, 2004
Application Number:
20040014267
Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof. In one embodiment, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum layer and a second aluminum layer that are electrically isolated from each other by a dielectric layer. The method further comprises…
Power device having electrodes on a top surface thereof
Granted: November 20, 2003
Application Number:
20030214012
A power device includes a substrate assembly including an upper surface and a lower surface. The substrate assembly includes a first layer and a second layer. The first layer overlies the second layer and has different conductivity than the second layer. A first electrode is provided proximate the upper surface. A second electrode is provided proximate the upper surface and is spaced apart from the first electrode. The second layer is configured to provide a current path between the…
Electrically isolated power device package
Granted: October 2, 2003
Application Number:
20030186483
A packaged power device includes a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer. The first conductive layer is bonded to the second dielectric layer, and the second dielectric layer is bonded to the third conductive layer. The first and third conductive layers are electrically isolated from each other. The substrate has a lower surface. A semiconductor die is bonded to the first conductive layer of the substrate. A plastic package…
Power device and direct aluminum bonded substrate thereof
Granted: May 22, 2003
Application Number:
20030096450
Embodiments of the present invention are directed to packaged power semiconductor devices and direct-bonded metal substrates thereof. In one embodiment, a method for manufacturing a power semiconductor device comprises inserting a substrate assembly into a furnace having a plurality of process zones. The substrate assembly includes a first aluminum layer and a second aluminum layer that are electrically isolated from each other by a dielectric layer. The method further comprises…
Rugged and fast power mosfet and IGBT
Granted: April 10, 2003
Application Number:
20030067034
A power semiconductor device includes a substrate having an upper surface and a lower surface. A source region of first conductivity is formed within a well region of second conductivity. The source region is provided proximate to the upper surface of the substrate. The well region has a non-polygon design. A gate electrode overlies the upper surface of the substrate. A drain electrode is provided proximate to the lower surface of the substrate.
Semiconductor devices having group III-V compound layers
Granted: January 9, 2003
Application Number:
20030006455
A power semiconductor device includes a substrate of first conductivity having a dopant concentration of a first level. The substrate is a group III-V compound material. A transitional layer of first conductivity is epitaxially grown over the substrate. The transitional layer has a dopant concentration of a second level and is a group III-V compound material. An epitaxial layer of first conductivity is grown over the transitional layer and has a dopant concentration of a third level.…
Method for fabricating forward and reverse blocking devices
Granted: November 21, 2002
Application Number:
20020171116
A power device includes a gate electrode, a source electrode, and a drain electrode provided within an active region of a semiconductor substrate of first conductivity type. A vertical diffusion region of second conductivity is provided at a periphery the active region. The vertical diffusion region extends continuously from a top surface of the substrate to a bottom surface of the substrate. The vertical diffusion region includes an upper portion having a first depth and a lower portion…
Electrically isolated power device package
Granted: November 21, 2002
Application Number:
20020171134
A packaged power device includes a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer. The first conductive layer is bonded to the second dielectric layer, and the second dielectric layer is bonded to the third conductive layer. The first and third conductive layers are electrically isolated from each other. The substrate has a lower surface. A semiconductor die is bonded to the first conductive layer of the substrate. A plastic package…
High frequency power device with a plastic molded package and direct bonded substrate
Granted: November 7, 2002
Application Number:
20020163070
A radio frequency power device includes a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer. The first conductive layer is bonded to the second dielectric layer, and the second dielectric layer is bonded to the third conductive layer. The first and third conductive layers are electrically isolated from each other. A semiconductor die is bonded to the first conductive layer of the substrate. A plastic package encloses and protects the…
Power device with a plastic molded package and direct bonded substrate
Granted: November 7, 2002
Application Number:
20020163074
A power device compatible with an SOT 227 package standard. The device includes a substrate including a first conductive layer, a second dielectric layer, and a third conductive layer. The first conductive layer is bonded to the second dielectric layer, and the second dielectric layer is bonded to the third conductive layer. The first and third conductive layers are electrically isolated from each other. The first conductive layer has been patterned to provide at least first and second…
Hot-swap protection circuit
Granted: August 29, 2002
Application Number:
20020118501
Embodiments of the present invention provide methods and circuitry for protecting a circuit during hot-swap events. Hot swap protection circuitry includes as overcurrent detection circuit which decouples power from a load. Circuitry is provided to detect ground-fault conditions. Noise detection circuitry is provided to reduce noise in the power that is delivered to the load.
Differential amplifier having active load device scaling
Granted: June 27, 2002
Application Number:
20020079966
In a CMOS differential amplifier, first and second input transistors are matched in size to each other, and first and second load transistors are matched in size to each other. The first input transistor, a source follower transistor, and the first load transistor form one current branch of the differential structure while the second input transistor and second load transistor form another current branch of the differential structure. A first current source supplies current to both…
Standard CMOS compatible band gap reference
Granted: June 13, 2002
Application Number:
20020070793
The present invention provides a CMOS low noise band gap reference circuit that outputs a substantially constant reference voltage VREF. Band gap reference circuits of the present invention have an amplifier that includes a differential pair of bipolar junction transistors and a feedback circuit that adjusts it current to compensate for variations in the bias current through the circuit. The band gap reference circuits of the present invention provide a output reference voltage VREF that…
Stable high voltage semiconductor device structure
Granted: June 6, 2002
Application Number:
20020068404
A power integrated circuit device with multiple guard rings and field plates overlying regions between each of the guard rings. Each of the field plates form overlying a dielectric layer also between each of the guard rings. Multiple field plates can exist between each of such guard rings. At least one field plate couples to a main junction region, and another field plate couples to a peripheral region, typically a scribe line. The present power device structure with multiple guard rings…
