Process compatibility improvement by fill factor modulation
Granted: March 3, 2020
Patent Number:
10579768
Metrology targets and target design methods are provided, in which target elements are defined by replacing elements from a periodic pattern having a pitch p, by assist elements having at least one geometric difference from the replaced elements, to form a composite periodic structure that maintains the pitch p as a single pitch. Constructing targets within the bounds of compatibility with advanced multiple patterning techniques improves the fidelity of the targets and fill factor…
Patterned wafer geometry measurements for semiconductor process controls
Granted: March 3, 2020
Patent Number:
10576603
Wafer geometry measurement tools and methods for providing improved wafer geometry measurements are disclosed. Wafer front side, backside and flatness measurements are taken into consideration for semiconductor process control. The measurement tools and methods in accordance with embodiments of the present disclosure are suitable for handling any types of wafers, including patterned wafers, without the shortcomings of conventional metrology systems.
System and method for aligning semiconductor device reference images and test images
Granted: February 25, 2020
Patent Number:
10572991
A method may include, but is not limited to, receiving a plurality of reference images of a wafer. The method may include, but is not limited to, receiving the plurality of test images of the wafer. The method may include, but is not limited to, aligning the plurality of reference images and the plurality of test images via a coarse alignment process. The method may include, but is not limited to, aligning the plurality of reference images and the plurality of test images via a fine…
Device metrology targets and methods
Granted: February 25, 2020
Patent Number:
10571811
Metrology methods and targets are provided, that expand metrological procedures beyond current technologies into multi-layered targets, quasi-periodic targets and device-like targets, without having to introduce offsets along the critical direction of the device design. Several models are disclosed for deriving metrology data such as overlays from multi-layered target and corresponding configurations of targets are provided to enable such measurements. Quasi-periodic targets which are…
Determining information for defects on wafers
Granted: February 25, 2020
Patent Number:
10571407
Systems and methods for determining information for defects on a wafer are provided. One system includes an illumination subsystem configured to direct light having one or more illumination wavelengths to a wafer. The one or more illumination wavelengths are selected to cause fluorescence from one or more materials on the wafer without causing fluorescence from one or more other materials on the wafer. The system also includes a detection subsystem configured to detect only the…
Compensated mechanical testing system
Granted: February 25, 2020
Patent Number:
10571379
A mechanical testing system having a frame, and a stage for holding a sample. An arm for pressing a tool against a surface of the sample. A primary actuator is connected to the frame and applies a primary force and drives the tool relative to the sample, thereby causing the frame to flex. A displacement sensor measures a displacement value comprised of two components, the first component including a distance traveled by the probe into the sample as the primary force is applied, and the…
Transparent film error correction pattern in wafer geometry system
Granted: February 25, 2020
Patent Number:
10571248
A system includes one or more wafer geometry measurement tools configured to obtain geometry measurements from a wafer. The system also includes one or more processors in communication with the one or more wafer geometry measurement tools. The one or more processors are configured to apply a correction model to correct the geometry measurements obtained by the one or more wafer geometry measurement tools. The correction model is configured to correct measurement errors caused by a…
All surface film metrology system
Granted: February 18, 2020
Patent Number:
10563973
A system is configured to perform metrology on a front surface, a back surface opposite the front surface, and/or an edge between the front surface and the back surface of a wafer. This can provide all wafer metrology and/or metrology of thin films on the back surface of the wafer. In an example, the thickness and/or optical properties of a thin film on a back surface of a wafer can be determined using a ratio of a greyscale image of a bright field light emerging from the back surface of…
System and method for pumping laser sustained plasma with a frequency converted illumination source
Granted: February 18, 2020
Patent Number:
10568195
A system for generating pump illumination for laser sustained plasma (LSP) is disclosed. In embodiments, the system includes an illumination source configured to output illumination having a first spectral frequency and an optical frequency converter. The optical frequency converter can be configured to receive the illumination having the first spectral frequency from the illumination source and configured to output pump illumination having a second spectral frequency that is different…
Utilizing overlay misregistration error estimations in imaging overlay metrology
Granted: February 18, 2020
Patent Number:
10565697
Systems and methods are provided, which calculate overlay misregistration error estimations from analyzed measurements of each ROI (region of interest) in at least one metrology imaging target, and incorporate the calculated overlay misregistration error estimations in a corresponding estimation of overlay misregistration. Disclosed embodiments provide a graduated and weighted analysis of target quality which may be integrated in a continuous manner into the metrology measurement…
Electron source
Granted: February 11, 2020
Patent Number:
10558123
An electron source is formed on a silicon substrate having opposing first and second surfaces. At least one field emitter is prepared on the second surface of the silicon substrate to enhance the emission of electrons. To prevent oxidation of the silicon, a thin, contiguous boron layer is disposed directly on the output surface of the field emitter using a process that minimizes oxidation and defects. The field emitter can take various shapes such as pyramids and rounded whiskers. One or…
Capture of repeater defects on a semiconductor wafer
Granted: February 11, 2020
Patent Number:
10557802
Repeater analysis at a first threshold identifies repeater defects. The repeater defects are located at a coordinate that is the same on each reticle. Images on every reticle of the semiconductor wafer at the coordinate are received, and a plurality of signed difference images are obtained. A repeater threshold for signed difference images is calculated, as is consistency of the polarity. The threshold is applied to the images and a number of defects per each repeater that remain are…
Hybrid inspection system for efficient process window discovery
Granted: February 4, 2020
Patent Number:
10551827
An inspection system includes a controller communicatively coupled to a physical inspection device (PID), a virtual inspection device (VID) configured to analyze stored PID data, and a defect verification device (DVD). The controller may receive a pattern layout of a sample including multiple patterns fabricated with selected lithography configurations defining a process window, receive locations of PID-identified defects identified through analysis of the sample with the PID, wherein…
Metrology targets with supplementary structures in an intermediate layer
Granted: February 4, 2020
Patent Number:
10551749
Metrology targets, production processes and optical systems are provided, which enable metrology of device-like targets. Supplementary structure(s) may be introduced in the target to interact optically with the bottom layer and/or with the top layer of the target and target cells configurations enable deriving measurements of device-characteristic features. For example, supplementary structure(s) may be designed to yield Moiré patterns with one or both layers, and metrology parameters…
Activation of wafer particle defects for spectroscopic composition analysis
Granted: February 4, 2020
Patent Number:
10551320
Methods and systems for detecting a particle defect on a wafer surface, transforming the particle to a spectroscopically active state, and identifying a material composition of the activated particle by a spectroscopic technique are described herein. Particle defects are transformed by chemical treatment, thermal treatment, photochemical treatment, or a combination thereof, such that an activated particle exhibits atomic vibrational bands that can be observed spectroscopically. In one…
Optical measurement of a highly absorbing film layer over highly reflective film stacks
Granted: February 4, 2020
Patent Number:
10551166
Apparatus and methods for performing optically based film thickness measurements of highly absorbing films (e.g., high-K dielectric films) with improved measurement sensitivity are described herein. A highly absorbing film layer is fabricated on top of a highly reflective film stack. The highly reflective film stack includes one or more nominally identical sets of multiple layers of different, optically contrasting materials. The highly reflective film stack gives rise to optical…
Pick-and-place head and method for picking work-pieces
Granted: January 28, 2020
Patent Number:
10543600
A pick-and-place head for picking a plurality of work-pieces from at least one first location and for placing the plurality of work-pieces at least one second location is disclosed. The pick-and-place head exhibits a plurality of nozzles, wherein each nozzle is configured to engage one of the work-pieces by action of a vacuum. At least one nozzle has an individual vacuum supply and at least two further nozzles have a shared vacuum supply. A corresponding method is also disclosed, the…
Statistical overlay error prediction for feed forward and feedback correction of overlay errors, root cause analysis and process control
Granted: January 28, 2020
Patent Number:
10545412
A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is…
Computationally efficient X-ray based overlay measurement
Granted: January 28, 2020
Patent Number:
10545104
Methods and systems for performing overlay and edge placement errors of device structures based on x-ray diffraction measurement data are presented. Overlay error between different layers of a metrology target is estimated based on the intensity variation within each x-ray diffraction order measured at multiple, different angles of incidence and azimuth angles. The estimation of overlay involves a parameterization of the intensity modulations of common orders such that a low frequency…
Ultra-high sensitivity hybrid inspection with full wafer coverage capability
Granted: January 28, 2020
Patent Number:
10545099
Disclosed are apparatus and methods for detecting defects on a semiconductor sample. An optical inspector is first used to inspect a semiconductor sample with an aggressively predefined threshold selected to detect candidate defect and nuisance sites at corresponding locations across the sample. A high-resolution distributed probe inspector includes an array of miniature probes that are moved relative to the sample to scan and obtain a high-resolution image of each site to detect and…
