Lam Research Patent Applications

MOLYBDENUM TEMPLATES FOR TUNGSTEN

Granted: January 13, 2022
Application Number: 20220013365
Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication, The methods involve forming bulk conductive films on thin low resistivity transition metal layers that have large grain size. The bulk conductive films follow the grains of the low resistivity transition metal films, resulting in large grain size. Also provided are devices including template layers and bulk films.

METHODS FOR MAKING HARD MASKS USEFUL IN NEXT-GENERATION LITHOGRAPHY

Granted: December 23, 2021
Application Number: 20210397085
Imaging layers on the surface of a substrate may be patterned using next generation lithographic techniques, and the resulting patterned film may be used as a lithographic mask, for example, for production of a semiconductor device.

CROSS FLOW CONDUIT FOR FOAMING PREVENTION IN HIGH CONVECTION PLATING CELLS

Granted: December 23, 2021
Application Number: 20210395913
The embodiments herein relate to apparatuses and methods for electroplating one or more materials onto a substrate. Embodiments herein utilize a cross flow conduit in the electroplating cell to divert flow of fluid from a region between a substrate and a channeled ionically resistive plate positioned near the substrate down to a level lower than level of fluid in a fluid containment unit for collecting overflow fluid from the plating system for recirculation. The cross flow conduit can…

THROUGHPUT IMPROVEMENT WITH INTERVAL CONDITIONING PURGING

Granted: December 23, 2021
Application Number: 20210395885
Processing methods and apparatus for increasing a reaction chamber batch size. Such a method of processing deposition substrates (e.g., wafers), involves conducting a deposition on a first portion of a batch of deposition wafers in a reaction chamber, conducting an interval conditioning reaction chamber purge to remove defects generated by the wafer processing from the reaction chamber; and following the interval conditioning mid-batch reaction chamber purge, conducting the deposition on…

PLASMA ENHANCED WAFER SOAK FOR THIN FILM DEPOSITION

Granted: November 25, 2021
Application Number: 20210366705
Disclosed are apparatuses and methods for providing a substrate onto a substrate support in a processing chamber, generating an inert plasma in the processing chamber, and maintaining the inert plasma to heat the substrate to a steady state temperature, suitable for conducting plasma-enhanced chemical vapor deposition (PECVD), in less than 30 seconds from providing the substrate onto the substrate support. An apparatus may include a processing chamber, a process station that includes a…

ULTRATHIN ATOMIC LAYER DEPOSITION FILM ACCURACY THICKNESS CONTROL

Granted: November 4, 2021
Application Number: 20210343520
Methods for depositing ultrathin films by atomic layer deposition with reduced wafer-to-wafer variation are provided. Methods involve exposing the substrate to soak gases including one or more gases used during a plasma exposure operation of an atomic layer deposition cycle prior to the first atomic layer deposition cycle to heat the substrate to the deposition temperature.

IN SITU PROTECTIVE COATING OF CHAMBER COMPONENTS FOR SEMICONDUCTOR PROCESSING

Granted: November 4, 2021
Application Number: 20210340670
An in situ protective coating is deposited on surfaces of chamber components of a reaction chamber at high temperatures. The in situ protective coating may be deposited at a temperature greater than about 200° C. to provide a high quality coating that is resistant to certain types of halogen chemistries, such as fluorine-based species, chlorine-based species, bromine-based species, or iodine-based species. Subsequent coatings or layers may be deposited on the in situ protective coating…

CONTINUOUS PLASMA FOR FILM DEPOSITION AND SURFACE TREATMENT

Granted: October 28, 2021
Application Number: 20210335606
Disclosed are apparatuses and methods for flowing a reactant process gas into a processing chamber containing a substrate, generating a plasma at a first power level in the processing chamber during the flowing of the reactant process gas, thereby depositing a layer of a material on the substrate by plasma-enhanced chemical vapor deposition, maintaining the plasma while ceasing flowing the reactant process gas into the processing chamber, thereby stopping the depositing, without…

ELECTRON EXCITATION ATOMIC LAYER ETCH

Granted: September 9, 2021
Application Number: 20210280433
Disclosed are apparatuses and methods for performing atomic layer etching. A method may include modifying one or more surface layers of material on the substrate and exposing the one or more modified surface layers on the substrate to an electron source thereby removing, without using a plasma, the one or more modified surface layers on the substrate. An apparatus may include a processing chamber, a process gas unit, an electron source, and a controller with instructions configured to…

THERMAL IMAGING FOR WITHIN WAFER VARIABILITY FEEDFORWARD OR FEEDBACK INFORMATION

Granted: September 2, 2021
Application Number: 20210270673
IR radiation may be used to examine substrates prior to a fabrication operation in order to adjust processing parameters of the fabrication operation, or to determine features of the substrate. A thermographic image may be collected and provided to a transfer function or machine learning model to determine processing parameters or features. The processing parameters may improve the uniformity of the wafer and/or achieve a desired target feature value.

RESIST AND ETCH MODELING

Granted: May 27, 2021
Application Number: 20210157228
Computer implemented methods and computer program products have instructions for generating transfer functions that relate segments on lithography photomasks to features produced by photolithography and etching using such segments. Such methods may be characterized by the following elements: (a) receiving after development inspection metrology results produced from one or more first test substrates on which resist was applied and patterned using a set of design layout segments; (b)…

CONTROLLING PLATING ELECTROLYTE CONCENTRATION ON AN ELECTROCHEMICAL PLATING APPARATUS

Granted: May 6, 2021
Application Number: 20210130976
Methods and electroplating systems for controlling plating electrolyte concentration on an electrochemical plating apparatus for substrates are disclosed. A method involves: (a) providing an electroplating solution to an electroplating system; (b) electroplating the metal onto the substrate while the substrate is held in a cathode chamber of an electroplating cell of electroplating system; (c) supplying the make-up solution to the electroplating system via a make-up solution inlet; and…

THERMAL ATOMIC LAYER ETCH WITH RAPID TEMPERATURE CYCLING

Granted: April 8, 2021
Application Number: 20210104414
Disclosed are apparatuses and methods for performing atomic layer etching. A method may include supporting and thermally floating a substrate in a processing chamber, modifying one or more surface layers of material on the substrate by chemical adsorption, without using a plasma, while the substrate is maintained at a first temperature, and removing the one or more modified surface layers by desorption, without using a plasma, while the substrate is maintained at a second temperature,…

CONNECTOR FOR SUBSTRATE SUPPORT WITH EMBEDDED TEMPERATURE SENSORS

Granted: February 18, 2021
Application Number: 20210047732
An electrical connector includes first, second, third, and fourth electrical conductors. The first, second, third, and fourth electrical conductors each include a first end to be electrically connected to a respective electrically conductive pad formed on a surface of a ceramic layer of a substrate support and a second end to be electrically connected to a respective wire within a through hole in the substrate support. The electrical connector also includes a retainer to hold the first,…

METHODS FOR MAKING EUV PATTERNABLE HARD MASKS

Granted: January 14, 2021
Application Number: 20210013034
Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: mixing a vapor stream of an organometallic precursor with a vapor stream of a counter-reactant so as to form a polymerized organometallic material; and depositing the organometallic polymer-like material onto the surface of the semiconductor substrate. The mixing and depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a…

SELF-LIMITING GROWTH

Granted: December 24, 2020
Application Number: 20200402846
Provided herein are methods and apparatuses for forming metal films such as tungsten (W) and molybdenum (Mo) films on semiconductor substrates. The methods involve forming a reducing agent layer, then exposing the reducing agent layer to a metal precursor to convert the reducing agent layer to a layer of the metal. In some embodiments, the reducing agent layer is a silicon- (Si-) and boron- (B-) containing layer. The methods may involve forming the reducing agent layer at a first…

METHOD TO CREATE AIR GAPS

Granted: July 9, 2020
Application Number: 20200219758
Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an…

TIN OXIDE THIN FILM SPACERS IN SEMICONDUCTOR DEVICE MANUFACTURING

Granted: July 9, 2020
Application Number: 20200219725
Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from…

ENHANCED AUTOMATIC WAFER CENTERING SYSTEM AND TECHNIQUES FOR SAME

Granted: May 7, 2020
Application Number: 20200144097
Systems and techniques for determining and correcting inter-wafer misalignments in a stack of wafers transported by a wafer handling robot are discussed. An enhanced automatic wafer centering system is provided that may be used to determine a smallest circle associated with the stack of wafers, which may then be used to determine whether or not the stack of wafer meets various process requirements and/or if a centering correction can be made to better align the wafers with a receiving…

METHOD OF ACHIEVING HIGH SELECTIVITY FOR HIGH ASPECT RATIO DIELECTRIC ETCH

Granted: March 19, 2020
Application Number: 20200090945
Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF6. Although WF6 is commonly used as a deposition gas (e.g., to deposit tungsten-containing film), it can also be used during etching. Advantageously, the inclusion of WF6 in the etch…