Carbon based depositions used for critical dimension control during high aspect ratio feature etches and for forming protective layers
Granted: March 11, 2025
Patent Number:
12249514
Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral…
Single crystal metal oxide plasma chamber component
Granted: March 11, 2025
Patent Number:
12249490
A component of a plasma processing chamber having at least one plasma facing surface of the component comprises single crystal metal oxide material. The component can be machined from a single crystal metal oxide ingot. Suitable single crystal metal oxides include spinel, yttrium oxide, and yttrium aluminum garnet (YAG). A single crystal metal oxide can be machined to form a gas injector of a plasma processing chamber.
Bubble defect reduction
Granted: March 11, 2025
Patent Number:
12248252
In some examples, a method of processing a substrate comprises applying a photoresist (PR) onto a surface of the substrate, pre-exposing the PR to ultra violet (UV) light before depositing or etching a metal oxide (MO) layer onto the PR, and depositing or etching a MO layer onto the PR subsequent to pre-exposing the PR to UV light.
Lipseal edge exclusion engineering to maintain material integrity at wafer edge
Granted: March 11, 2025
Patent Number:
12247310
Sequential electrodeposition of metals into through-mask features on a semiconductor substrate is conducted such as to reduce the deleterious consequences of lipseal's pressure onto the mask material. In a first electroplating step, a first metal (e.g., nickel) is electrodeposited using a lipseal that has an innermost point of contact with the semiconductor substrate at a first distance from the edge of the substrate. In a second electroplating step, a second metal (e.g., tin) is…
High temperature RF connection with integral thermal choke
Granted: March 4, 2025
Patent Number:
12243725
A thermal choke rod connecting a radio frequency source to a substrate support of a plasma processing system includes a tubular member having a first connector for connecting to an RF rod coupled to the substrate support and a second connector for connecting to an RF strap that couples to the RF source. A tubular segment extends between the first and second connectors. The first connector has a conically-shaped end region that tapers away from the inner surface thereof to an outer…
Flow metrology calibration for improved processing chamber matching in substrate processing systems
Granted: March 4, 2025
Patent Number:
12241772
A method for calibrating a gas flow metrology system for a substrate processing system includes a) measuring temperature using a first temperature sensor and a reference temperature sensor over a predetermined temperature range and determining a first transfer function; b) measuring pressure using a first pressure sensor and a reference pressure sensor over a predetermined pressure range using a first calibration gas and determining a second transfer function; c) performing a first…
Wafer shielding for prevention of lipseal plate-out
Granted: March 4, 2025
Patent Number:
12241173
Undesired deposition of metals on a lipseal (lipseal plate-out) during electrodeposition of metals on semiconductor substrates is minimized or eliminated by minimizing or eliminating ionic current directed at a lipseal. For example, electrodeposition can be conducted such as to avoid contact of a lipseal with a cathodically biased conductive material on the semiconductor substrate during the course of electroplating. This can be accomplished by shielding a small selected zone proximate…
Electrostatic chucks with coolant gas zones and corresponding groove and monopolar electrostatic clamping electrode patterns
Granted: February 25, 2025
Patent Number:
12237201
An electrostatic chuck for a substrate processing system is provided and includes a baseplate, an intermediate layer disposed on the baseplate, and a top plate. The top plate is bonded to the baseplate via the intermediate layer and is configured to electrostatically clamp to a substrate. The top plate includes a monopolar clamping electrode and seals. The monopolar clamping electrode includes a groove opening pattern with coolant gas groove opening sets. The seals separate coolant gas…
Nucleation-free tungsten deposition
Granted: February 25, 2025
Patent Number:
12237221
Provided herein are methods of depositing tungsten (W) films without depositing a nucleation layer. In certain embodiments, the methods involve depositing a conformal reducing agent layer of boron (B) and/or silicon (Si) on a substrate. The substrate generally includes a feature to be filled with tungsten with the reducing agent layer conformal to the topography of the substrate including the feature. The reducing agent layer is then exposed to a fluorine-containing tungsten precursor,…
System, method, and user interface for edge ring wear compensation
Granted: February 25, 2025
Patent Number:
12237203
A method for adjusting a height of an edge ring arranged around an outer portion of a substrate support includes receiving at least one input indicative of one or more erosion rates of the edge ring. The at least one input includes a plurality of erosion rates for respective usage periods of a substrate processing system. The method further includes determining at least one erosion rate of the edge ring using the plurality of erosion rates for the respective usage periods, monitoring an…
Polymerization protective liner for reactive ion etch in patterning
Granted: February 25, 2025
Patent Number:
12237175
Methods of patterning vias and trenches using a polymerization protective liner after forming a lower patterned mask layer used for etching trenches on a semiconductor substrate prior to forming an upper patterned mask layer used for etching vias are provided. Methods involve forming a polymerization protective liner either nonconformally or conformally using silicon tetrachloride and methane polymerization. Polymerization protective liners may be sacrificial.
Magnetic shielding for plasma sources
Granted: February 25, 2025
Patent Number:
12237155
In some examples, a magnetic shield for a plasma source is provided. An example magnetic shield comprises a back-shell. The back-shell includes a cage defined, at least in part, by an arrangement of bars of ferro-magnetic material. The cage is sized and configured to at least extend over a top side of an RF source coil for the plasma source.
Bottom and middle edge rings
Granted: February 25, 2025
Patent Number:
12237154
A bottom ring is configured to support a moveable edge ring. The edge ring is configured to be raised and lowered relative to a substrate support. The bottom ring includes an upper surface that is stepped, an annular inner diameter, an annular outer diameter, a lower surface, and a plurality of vertical guide channels provided through the bottom ring from the lower surface to the upper surface of the bottom ring. Each of the guide channels includes a first region having a smaller…
Method of depositing silicon nitride films
Granted: February 18, 2025
Patent Number:
12230495
A method for depositing a silicon nitride layer on a stack is provided. The method comprises providing an atomic layer deposition, comprising a plurality of cycles, wherein each cycle comprises dosing the stack with a silicon containing precursor by providing a silicon containing precursor gas, providing an N2 plasma conversion, and providing an H2 plasma conversion.
Moveable edge ring designs
Granted: February 18, 2025
Patent Number:
12230482
An edge ring is configured to be raised and lowered relative to a substrate support, via one or more lift pins, in a substrate processing system. The edge ring is further configured to interface with a guide feature extending upward from a bottom ring and/or a middle ring of the substrate support during tuning of the edge ring. The edge ring includes an upper surface, an annular inner diameter, an annular outer diameter, a lower surface, and an annular groove arranged in the lower…
Vapor accumulator for corrosive gases with purging
Granted: February 18, 2025
Patent Number:
12227842
Vapor accumulator reservoirs for semiconductor processing operations, such as atomic layer deposition operations, are provided. Such vapor accumulator reservoirs may include a perimeter plenum volume filled with an inert gas, which may reduce or prevent the leakage of external contaminants into a process gas. In some implementations, the reservoir may be constructed from corrosion-resistant materials to reduce internal contaminants into the process gas.
Substrate support with varying depths of areas between mesas and corresponding temperature dependent method of fabricating
Granted: February 18, 2025
Patent Number:
12227840
A method is provided and includes: determining a temperature distribution pattern across a substrate or a support plate of a substrate support; determining, based on the temperature distribution pattern, a number of masks to apply to a top surface of the support plate, where the number of masks is greater than or equal to two; and determining patterns of the masks based on the temperature distribution pattern; and applying the masks over the top surface. The method further includes:…
Ex situ coating of chamber components for semiconductor processing
Granted: February 18, 2025
Patent Number:
12227837
Forming a protective coating ex situ in an atomic layer deposition process to coat one or more chamber components subsequently installed in a reaction chamber provides a number of benefits over more conventional coating methods such as in situ deposition of an undercoat. In certain cases the protective coating may have a particular composition such as aluminum oxide, aluminum fluoride, aluminum nitride, yttrium oxide, and/or yttrium fluoride. The protective coating may help reduce…
Low temperature manifold assembly for substrate processing systems
Granted: February 11, 2025
Patent Number:
12224161
A manifold assembly for a processing chamber in a substrate processing system includes a manifold. The manifold includes a first valve assembly configured to flow a liquid coolant at a first temperature from a first channel of a coolant assembly to the processing chamber. The first valve assembly is configured to flow the liquid coolant at a cryogenic temperature. The manifold further includes a first weldment block including tubing associated with the first valve assembly, a second…
Method for etching features using a targeted deposition for selective passivation
Granted: February 4, 2025
Patent Number:
12217955
A method for patterning a stack having a mask with a plurality of mask features is provided. A targeted deposition is provided, wherein the targeted deposition comprises a plurality of cycles, wherein each cycle comprises flowing a precursor to deposit a layer of precursor and targeted curing the layer of precursor, comprising flowing a curing gas, flowing a modification gas, forming a plasma from the curing gas and modification gas, and exposing the layer of precursor to the plasma…
