Method and apparatus for measuring particles
Granted: April 8, 2025
Patent Number:
12270748
An apparatus for measuring contamination on a critical surface of a part is provided. A vessel for mounting the part is provided. An inert gas source is in fluid connection with the vessel and adapted to provide an inert gas to the vessel. At least one diffuser receives the inert gas from the vessel, wherein the critical surface of the part is exposed to the inert gas when the part is mounted in the vessel. At least one analyzer is adapted to receive inert gas from the at least one…
Plasma-enhanced atomic layer deposition with radio-frequency power ramping
Granted: April 8, 2025
Patent Number:
12270103
Methods and apparatuses for depositing thin films using plasma-enhanced atomic layer deposition (PEALD) with ramping radio-frequency (RF) power are provided herein. Embodiments involve increasing the RF power setting of PEALD cycles after formation of initial screening layers at low RF power settings.
Thermoelectric cooling pedestal for substrate processing systems
Granted: April 1, 2025
Patent Number:
12266588
A temperature-controlled pedestal includes a pedestal, a temperature sensor to sense N temperature in N zones, and N temperature control devices arranged in the N zones, respectively. A voltage source selectively supplies power to the N temperature control devices. A controller is configured to cause the voltage source to control a temperature in the N zones by a) determining a hottest one of the N zones based on the N temperatures; b) if the hottest one of the N zones is not already…
Atomic layer etching for subtractive metal etch
Granted: April 1, 2025
Patent Number:
12266542
A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by…
Systems and methods for using binning to increase power during a low frequency cycle
Granted: April 1, 2025
Patent Number:
12266505
A method for achieving uniformity in an etch rate is described. The method includes receiving a voltage signal from an output of a match, and determining a positive crossing and a negative crossing of the voltage signal for each cycle of the voltage signal. The negative crossing of each cycle is consecutive to the positive crossing of the cycle. The method further includes dividing a time interval of each cycle of the voltage signal into a plurality of bins. For one or more of the…
Inlet adapter component
Granted: April 1, 2025
Patent Number:
D1069043
Protection system for switches in direct drive circuits of substrate processing systems
Granted: March 25, 2025
Patent Number:
12261029
A direct drive system for providing RF power to a component of a substrate processing system includes a direct drive circuit including a switch and configured to supply RF power to the component. A switch protection module is configured to monitor a load current and a load voltage in a processing chamber, calculate load resistance based on the load current and the load voltage, compare the load resistance to a first predetermined load resistance, and adjust at least one of an RF power…
Tungsten feature fill with inhibition control
Granted: March 25, 2025
Patent Number:
12261081
Methods for selective inhibition control in semiconductor manufacturing are provided. An example method includes providing a substrate including a feature having one or more feature openings and a feature interior. A nucleation layer is formed on a surface of the feature interior. Based on a differential inhibition profile, a nonconformal bulk layer is selectively formed on a surface of the nucleation layer to leave a region of the nucleation layer covered, and a region of the nucleation…
Multi-layer hardmask for defect reduction in EUV patterning
Granted: March 25, 2025
Patent Number:
12261044
Various embodiments herein relate to methods, apparatus, and systems that utilize a multi-layer hardmask in the context of patterning a semiconductor substrate using extreme ultraviolet photoresist. The multi-layer hardmask includes (1) an upper layer that includes a metal-containing material such as a metal oxide, a metal nitride, or a metal oxynitride, and (2) a lower layer that includes an inorganic dielectric silicon-containing material. Together, these layers of the multi-layer…
Gapfill of variable aspect ratio features with a composite PEALD and PECVD method
Granted: March 25, 2025
Patent Number:
12261038
Provided herein are methods and apparatus for filling one or more gaps on a semiconductor substrate. The disclosed embodiments are especially useful for forming seam-free, void-free fill in both narrow and wide features. The methods may be performed without any intervening etching operations to achieve a single step deposition. In various implementations, a first operation is performed using a novel PEALD fill mechanism to fill narrow gaps and line wide gaps. A second operation may be…
Plenum assemblies for cooling transformer coupled plasma windows
Granted: March 25, 2025
Patent Number:
12261018
A plenum for a dielectric window of a substrate processing system includes a first inlet port, a second inlet port, and a body. The body includes: a first recessed area configured to hold a first coil; a second recessed area configured to hold a second coil; a third recessed area configured to oppose a first area of the dielectric window, receive a first coolant from the first inlet port, and direct the first coolant across the first area to cool a first portion of the dielectric window;…
Chemical etch nonvolatile materials for MRAM patterning
Granted: March 18, 2025
Patent Number:
12256645
A method is provided. A substrate situated in a chamber is exposed to a halogen-containing gas comprising an element selected from the group consisting of silicon, germanium, carbon, titanium, and tin, and igniting a plasma to modify a surface of the substrate and form a modified surface. The substrate is exposed to an activated activation gas to etch at least part of the modified surface.
Process control for ion energy delivery using multiple generators and phase control
Granted: March 18, 2025
Patent Number:
12255052
A method for applying RF power in a plasma process chamber is provided, including: generating a first RF signal; generating a second RF signal; generating a third RF signal; wherein the first, second, and third RF signals are generated at different frequencies; combining the first, second and third RF signals to generate a combined RF signal, wherein a wave shape of the combined RF signal is configured to approximate a sloped square wave shape; applying the combined RF signal to a chuck…
Non-elastomeric, non-polymeric, non-metallic membrane valves for semiconductor processing equipment
Granted: March 18, 2025
Patent Number:
12253190
Non-elastomeric, non-polymeric, non-metallic membrane valves for use in high-vacuum applications are disclosed. Such valves are functional even when the fluid-control side of the valve is exposed to a sub-atmospheric pressure field which may generally act to collapse/seal traditional elastomeric membrane valves.
In-situ PECVD cap layer
Granted: March 18, 2025
Patent Number:
12252782
Methods for filling gaps with dielectric material involve deposition using an atomic layer deposition (ALD) technique to fill a gap followed by deposition of a cap layer on the filled gap by a chemical vapor deposition (CVD) technique. The ALD deposition may be a plasma-enhanced ALD (PEALD) or thermal ALD (tALD) deposition. The CVD deposition may be plasma-enhanced CVD (PECVD) or thermal CVD (tCVD) deposition. In some embodiments, the CVD deposition is performed in the same chamber as…
Carbon based depositions used for critical dimension control during high aspect ratio feature etches and for forming protective layers
Granted: March 11, 2025
Patent Number:
12249514
Fabricating a semiconductor substrate by (a) vertical etching a feature having sidewalls and a depth into one or more layers formed on the semiconductor substrate and (b) depositing an amorphous carbon liner onto the sidewalls of the feature. Steps (a) and optionally (b) are iterated until the vertical etch feature has reached a desired depth. With each iteration of (a), the feature is vertical etched deeper into the one or more layers, while the amorphous carbon liner resists lateral…
Single crystal metal oxide plasma chamber component
Granted: March 11, 2025
Patent Number:
12249490
A component of a plasma processing chamber having at least one plasma facing surface of the component comprises single crystal metal oxide material. The component can be machined from a single crystal metal oxide ingot. Suitable single crystal metal oxides include spinel, yttrium oxide, and yttrium aluminum garnet (YAG). A single crystal metal oxide can be machined to form a gas injector of a plasma processing chamber.
Bubble defect reduction
Granted: March 11, 2025
Patent Number:
12248252
In some examples, a method of processing a substrate comprises applying a photoresist (PR) onto a surface of the substrate, pre-exposing the PR to ultra violet (UV) light before depositing or etching a metal oxide (MO) layer onto the PR, and depositing or etching a MO layer onto the PR subsequent to pre-exposing the PR to UV light.
Lipseal edge exclusion engineering to maintain material integrity at wafer edge
Granted: March 11, 2025
Patent Number:
12247310
Sequential electrodeposition of metals into through-mask features on a semiconductor substrate is conducted such as to reduce the deleterious consequences of lipseal's pressure onto the mask material. In a first electroplating step, a first metal (e.g., nickel) is electrodeposited using a lipseal that has an innermost point of contact with the semiconductor substrate at a first distance from the edge of the substrate. In a second electroplating step, a second metal (e.g., tin) is…
Wafer shielding for prevention of lipseal plate-out
Granted: March 4, 2025
Patent Number:
12241173
Undesired deposition of metals on a lipseal (lipseal plate-out) during electrodeposition of metals on semiconductor substrates is minimized or eliminated by minimizing or eliminating ionic current directed at a lipseal. For example, electrodeposition can be conducted such as to avoid contact of a lipseal with a cathodically biased conductive material on the semiconductor substrate during the course of electroplating. This can be accomplished by shielding a small selected zone proximate…
