Film stack simplification for high aspect ratio patterning and vertical scaling
Granted: September 3, 2024
Patent Number:
12080592
Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial…
Atomic layer etch and ion beam etch patterning
Granted: September 3, 2024
Patent Number:
12080562
A method for selectively etching a stack with respect to a mask is provided. An atomic layer etch is provided to at least partially etch the stack, wherein the atomic layer etch forms at least some residue. An ion beam is provided to etch the stack, wherein the ion beam etch removes at least some of the residue from the atomic layer etch.
Systems and methods for cleaning a showerhead
Granted: September 3, 2024
Patent Number:
12080528
Systems and methods for cleaning a showerhead are described. One of the systems includes a support section and a press plate located above the support section to be supported by the support section. The system further includes a cleaning layer located above the press plate. The cleaning layer moves to clean a showerhead. The support section contacts an arm of a spindle assembly for movement with movement of the arm.
Impedance match with an elongated RF strap
Granted: September 3, 2024
Patent Number:
12080518
An impedance match is described. The impedance match includes a housing having a bottom portion and a top portion. The bottom portion has match components and the top portion has an elongated body. A low frequency input is connected through the bottom portion of the housing, and the low frequency input is interconnected to a first set of capacitors and inductors. A high frequency input is connected through the bottom portion of the housing, and the high frequency input is interconnected…
Connector for substrate support with embedded temperature sensors
Granted: September 3, 2024
Patent Number:
12077862
An electrical connector includes first, second, third, and fourth electrical conductors. The first, second, third, and fourth electrical conductors each include a first end to be electrically connected to a respective electrically conductive pad formed on a surface of a ceramic layer of a substrate support and a second end to be electrically connected to a respective wire within a through hole in the substrate support. The electrical connector also includes a retainer to hold the first,…
Variable cycle and time RF activation method for film thickness matching in a multi-station deposition system
Granted: September 3, 2024
Patent Number:
12077859
Methods and apparatuses for depositing approximately equal thicknesses of a material on at least two substrates concurrently processed in separate stations of a multi-station deposition apparatus are provided.
Tungsten deposition
Granted: September 3, 2024
Patent Number:
12077858
Described herein are methods of filling features with tungsten and related apparatus. The methods described herein involve deposition of a tungsten nucleation layer prior to deposition of a bulk layer. The methods involve multiple atomic layer deposition (ALD) cycles. According to various embodiments, both a boron-containing reducing agent and silicon-reducing agent may be pulses during a single cycle to react with a tungsten-containing precursor and form a tungsten film.
Molybdenum deposition
Granted: August 27, 2024
Patent Number:
12074029
Provided herein are low resistance metallization stack structures for logic and memory applications and related methods of fabrication. The methods involve forming bulk conductive films on thin low resistivity transition metal layers that have large grain size. The bulk conductive films follow the grains of the low resistivity transition metal films, resulting in large grain size. Also provided are devices including template layers and bulk films.
Permanent secondary erosion containment for electrostatic chuck bonds
Granted: August 27, 2024
Patent Number:
12074049
A substrate support for a substrate processing chamber includes a baseplate, a ceramic layer bonded to the baseplate, and a seal provided in an outer perimeter of an interface between the ceramic layer and the baseplate. The seal is arranged to seal the interface from the substrate processing chamber and includes an adhesive comprising a first material arranged in the outer perimeter of the interface between the ceramic layer and the baseplate and a ring arranged in the outer perimeter…
Chiller make-break connector for substrate processing systems
Granted: August 27, 2024
Patent Number:
12074039
A substrate processing system includes a hinge assembly configured to allow a substrate support and an RF bias assembly to slide, from a docked position to an undocked position, relative to other components of a processing chamber. A make-break connector is configured to supply fluid to at least one of the substrate support and the RF bias assembly. The make-break connector includes a first portion including a first fluid passage connected to a first conduit. A second portion includes a…
Autoconfiguration of hardware components of various modules of a substrate processing tool
Granted: August 27, 2024
Patent Number:
12073224
A substrate processing system comprises a module to perform an operation associated with processing a semiconductor substrate in the substrate processing system. The module includes a component used with the processing of the semiconductor substrate, and a file stored in the module. The file includes information about the component of the module. The substrate processing system comprises a controller to communicate with the module via a network of the substrate processing system. The…
Model-based scheduling for substrate processing systems
Granted: August 27, 2024
Patent Number:
12072689
For etching tools, a neural network model is trained to predict optimum scheduling parameter values. The model is trained using data collected from preventive maintenance operations, recipe times, and wafer-less auto clean times as inputs. The model is used to capture underlying relationships between scheduling parameter values and various wafer processing scenarios to make predictions. Additionally, in tools used for multiple parallel material deposition processes, a nested neural…
Chamber component cleanliness measurement system
Granted: August 27, 2024
Patent Number:
12072318
An apparatus for measuring contaminants on a surface of a component is provided. An extraction vessel for holding a measurement fluid has an opening adapted to form a meniscus using the measurement fluid. An actuator moves at least one of the extraction vessel and the component to a position where the meniscus is in contact with the surface of the component. A transducer is positioned to provide acoustic energy to the measurement fluid.
Trim and deposition profile control with multi-zone heated substrate support for multi-patterning processes
Granted: August 27, 2024
Patent Number:
12071689
A substrate processing system is provided and includes a substrate support, a memory, and calibration, operating parameter, and solving modules. The substrate support supports a substrate and includes temperature control elements. The memory stores, for the temperature control elements, temperature calibration values and sensitivity calibration values. The calibration module, during calibration of the temperature control elements, performs a first calibration process to determine the…
Semiconductor substrate bevel cleaning
Granted: August 20, 2024
Patent Number:
12068152
A system for performing a bevel cleaning process on a substrate includes a substrate support including an electrode and a plurality of plasma needles arranged around a perimeter of the substrate support. The plasma needles are in fluid communication with a gas delivery system and are configured to supply reactive gases from the gas delivery system to a bevel region of the substrate when the substrate is arranged on the substrate support and electrically couple to the electrode of the…
Multi-level parameter and frequency pulsing with a low angular spread
Granted: August 20, 2024
Patent Number:
12068131
Systems and methods for multi-level pulsing of a parameter and multi-level pulsing of a frequency of a radio frequency (RF) signal are described. The parameter is pulsed from a low level to a high level while the frequency is pulsed from a low level to a high level. The parameter and the frequency are simultaneously pulsed to increase a rate of processing a wafer, to increase mask selectivity, and to reduce angular spread of ions within a plasma chamber.
Conditioning chamber component
Granted: August 20, 2024
Patent Number:
12064795
A method for conditioning a component of a wafer processing chamber is provided. The component is placed in an ultrasonic conditioning solution in an ultrasonic solution tank. Ultrasonic energy is applied through the ultrasonic conditioning solution to the component to clean the component. The component is submerged in a megasonic conditioning solution in a tank. Megasonic energy is applied through the megasonic conditioning solution to the component to clean the component.
Method for conditioning a plasma processing chamber
Granted: August 13, 2024
Patent Number:
12060636
A method for conditioning a plasma processing chamber including a chuck is provided. The method comprises a plurality of cycles, wherein each cycle comprises cleaning an interior of the plasma processing chamber and the chuck and forming a silicon oxide based coating on the interior of the plasma processing chamber and the chuck. The silicon oxide based coating has a first layer and a second layer.
High etch selectivity, low stress ashable carbon hard mask
Granted: August 13, 2024
Patent Number:
12062537
A method for depositing a carbon ashable hard mask layer on a substrate includes a) arranging a substrate in a processing chamber; b) setting chamber pressure in a predetermined pressure range; c) setting a substrate temperature in a predetermined temperature range from ?20° C. to 200° C.; d) supplying a gas mixture including hydrocarbon precursor and one or more other gases; and e) striking plasma by supplying RF plasma power for a first predetermined period to deposit a carbon…
Rapid flush purging during atomic layer deposition
Granted: August 13, 2024
Patent Number:
12060639
Provided herein are methods and related apparatus for purging processing chambers during an atomic layer deposition (ALD) process. The methods involve flowing purging gas from one or more accumulators to remove process gases from the processing chambers. Following the flowing of purging gas, additional reactants may be introduced into the processing chamber to continue an ALD cycle.
